linux-mips
[Top] [All Lists]

[PATCH 3/3] MIPS: BCM63XX: select correct MIPS_L1_CACHE_SHIFT value

To: <linux-mips@linux-mips.org>
Subject: [PATCH 3/3] MIPS: BCM63XX: select correct MIPS_L1_CACHE_SHIFT value
From: Florian Fainelli <florian@openwrt.org>
Date: Fri, 10 Jan 2014 12:35:14 -0800
Cc: <ralf@linux-mips.org>, <blogic@openwrt.org>, <jogo@openwrt.org>, <mbizon@freebox.fr>, <cernekee@gmail.com>, <dgcbueu@gmail.com>, Florian Fainelli <florian@openwrt.org>
In-reply-to: <1389386114-31834-1-git-send-email-florian@openwrt.org>
List-archive: <http://www.linux-mips.org/archives/linux-mips/>
List-help: <mailto:ecartis@linux-mips.org?Subject=help>
List-id: linux-mips <linux-mips.eddie.linux-mips.org>
List-owner: <mailto:ralf@linux-mips.org>
List-post: <mailto:linux-mips@linux-mips.org>
List-software: Ecartis version 1.0.0
List-subscribe: <mailto:ecartis@linux-mips.org?subject=subscribe%20linux-mips>
List-unsubscribe: <mailto:ecartis@linux-mips.org?subject=unsubscribe%20linux-mips>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <1389386114-31834-1-git-send-email-florian@openwrt.org>
Sender: linux-mips-bounce@linux-mips.org
Broadcom BCM63xx DSL SoCs have a L1-cache line size of 16 bytes (shift
value of 4) instead of the currently configured 32 bytes L1-cache line
size.

Reported-by: Daniel Gonzalez <dgcbueu@gmail.com>
Signed-off-by: Florian Fainelli <florian@openwrt.org>
---
 arch/mips/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 123f7c0..a3fec87 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -139,6 +139,7 @@ config BCM63XX
        select SWAP_IO_SPACE
        select ARCH_REQUIRE_GPIOLIB
        select HAVE_CLK
+       select MIPS_L1_CACHE_SHIFT_4
        help
         Support for BCM63XX based boards
 
-- 
1.8.3.2


<Prev in Thread] Current Thread [Next in Thread>