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[PATCH 3/3] MIPS: BCM47XX: add vectored interrupt support

To: ralf@linux-mips.org, blogic@openwrt.org
Subject: [PATCH 3/3] MIPS: BCM47XX: add vectored interrupt support
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Sun, 22 Dec 2013 14:36:32 +0100
Cc: linux-mips@linux-mips.org, Hauke Mehrtens <hauke@hauke-m.de>
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This adds support for vectored interrupt which is supported by the SoC
using a MIPS 74K CPU like the BCM4716 and BCM4706.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
 arch/mips/bcm47xx/Kconfig |    1 +
 arch/mips/bcm47xx/irq.c   |   23 +++++++++++++++++++++++
 2 files changed, 24 insertions(+)

diff --git a/arch/mips/bcm47xx/Kconfig b/arch/mips/bcm47xx/Kconfig
index 09fc922..582a8454 100644
--- a/arch/mips/bcm47xx/Kconfig
+++ b/arch/mips/bcm47xx/Kconfig
@@ -21,6 +21,7 @@ config BCM47XX_SSB
 config BCM47XX_BCMA
        bool "BCMA Support for Broadcom BCM47XX"
        select SYS_HAS_CPU_MIPS32_R2
+       select CPU_MIPSR2_IRQ_VI
        select BCMA
        select BCMA_HOST_SOC
        select BCMA_DRIVER_MIPS
diff --git a/arch/mips/bcm47xx/irq.c b/arch/mips/bcm47xx/irq.c
index a9133e9..e0585b7 100644
--- a/arch/mips/bcm47xx/irq.c
+++ b/arch/mips/bcm47xx/irq.c
@@ -25,6 +25,7 @@
 #include <linux/types.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
+#include <asm/setup.h>
 #include <asm/irq_cpu.h>
 #include <bcm47xx.h>
 
@@ -50,6 +51,18 @@ asmlinkage void plat_irq_dispatch(void)
                do_IRQ(6);
 }
 
+#define DEFINE_HWx_IRQDISPATCH(x)                                      \
+       static void bcm47xx_hw ## x ## _irqdispatch(void)               \
+       {                                                               \
+               do_IRQ(x);                                              \
+       }
+DEFINE_HWx_IRQDISPATCH(2)
+DEFINE_HWx_IRQDISPATCH(3)
+DEFINE_HWx_IRQDISPATCH(4)
+DEFINE_HWx_IRQDISPATCH(5)
+DEFINE_HWx_IRQDISPATCH(6)
+DEFINE_HWx_IRQDISPATCH(7)
+
 void __init arch_init_irq(void)
 {
 #ifdef CONFIG_BCM47XX_BCMA
@@ -64,4 +77,14 @@ void __init arch_init_irq(void)
        }
 #endif
        mips_cpu_irq_init();
+
+       if (cpu_has_vint) {
+               pr_info("Setting up vectored interrupts\n");
+               set_vi_handler(2, bcm47xx_hw2_irqdispatch);
+               set_vi_handler(3, bcm47xx_hw3_irqdispatch);
+               set_vi_handler(4, bcm47xx_hw4_irqdispatch);
+               set_vi_handler(5, bcm47xx_hw5_irqdispatch);
+               set_vi_handler(6, bcm47xx_hw6_irqdispatch);
+               set_vi_handler(7, bcm47xx_hw7_irqdispatch);
+       }
 }
-- 
1.7.10.4


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