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[PATCH 2/5] MIPS: BCM63XX: setup the HSSPI clock rate

To: linux-mips@linux-mips.org, linux-spi@vger.kernel.org
Subject: [PATCH 2/5] MIPS: BCM63XX: setup the HSSPI clock rate
From: Jonas Gorski <jogo@openwrt.org>
Date: Sat, 30 Nov 2013 12:42:03 +0100
Cc: Ralf Baechle <ralf@linux-mips.org>, Mark Brown <broonie@kernel.org>, John Crispin <blogic@openwrt.org>, Florian Fainelli <florian@openwrt.org>, Kevin Cernekee <cernekee@gmail.com>, Maxime Bizon <mbizon@freebox.fr>
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Properly set up the HSSPI clock rate depending on the SoC's PLL rate.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
---
 arch/mips/bcm63xx/clk.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/mips/bcm63xx/clk.c b/arch/mips/bcm63xx/clk.c
index 37a621a..6375652 100644
--- a/arch/mips/bcm63xx/clk.c
+++ b/arch/mips/bcm63xx/clk.c
@@ -390,3 +390,21 @@ void clk_put(struct clk *clk)
 }
 
 EXPORT_SYMBOL(clk_put);
+
+#define HSSPI_PLL_HZ_6328      133333333
+#define HSSPI_PLL_HZ_6362      400000000
+
+static int __init bcm63xx_clk_init(void)
+{
+       switch (bcm63xx_get_cpu_id()) {
+       case BCM6328_CPU_ID:
+               clk_hsspi.rate = HSSPI_PLL_HZ_6328;
+               break;
+       case BCM6362_CPU_ID:
+               clk_hsspi.rate = HSSPI_PLL_HZ_6362;
+               break;
+       }
+
+       return 0;
+}
+arch_initcall(bcm63xx_clk_init);
-- 
1.8.4.rc3

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