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Re: [MIPS] CP0 PRId and CP1 FPIR register access masks

To: Ralf Baechle <ralf@linux-mips.org>
Subject: Re: [MIPS] CP0 PRId and CP1 FPIR register access masks
From: "Maciej W. Rozycki" <macro@linux-mips.org>
Date: Tue, 17 Sep 2013 17:59:09 +0100 (BST)
Cc: linux-mips@linux-mips.org
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On Tue, 17 Sep 2013, Ralf Baechle wrote:

> But while it's cleaner, I think the idiom read_c0_prid() & some_MASK is
> so common that maybe something like
> 
>   #define read_c0_prid_imp()  (read_c0_prid() & PRID_IMP_MASK)
>   #define read_c0_prid_rev()  (read_c0_prid() & PRID_REV_MASK)
>   #define read_c0_prid_comp() (read_c0_prid() & PRID_COMP_MASK)
> 
> should be introduced as a next step.

 In some places maybe.  Other need several parts of PRId examined and 
using these accessors would be a pessimisation (GCC cannot combine 
multiple read_c0_prid() calls into one).  Some further places should 
probably use current_cpu_data.processor_id instead.  Maybe even most 
should.  Overall I'm not sure how much use these macros would get after 
all.

  Maciej

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