linux-mips
[Top] [All Lists]

Re: [PATCH] MIPS: Fix accessing to per-cpu data when flushing the cache

To: Markos Chandras <Markos.Chandras@imgtec.com>
Subject: Re: [PATCH] MIPS: Fix accessing to per-cpu data when flushing the cache
From: Ralf Baechle <ralf@linux-mips.org>
Date: Tue, 17 Sep 2013 18:02:19 +0200
Cc: linux-mips@linux-mips.org
In-reply-to: <20130917114356.GE22468@linux-mips.org>
List-archive: <http://www.linux-mips.org/archives/linux-mips/>
List-help: <mailto:ecartis@linux-mips.org?Subject=help>
List-id: linux-mips <linux-mips.eddie.linux-mips.org>
List-owner: <mailto:ralf@linux-mips.org>
List-post: <mailto:linux-mips@linux-mips.org>
List-software: Ecartis version 1.0.0
List-subscribe: <mailto:ecartis@linux-mips.org?subject=subscribe%20linux-mips>
List-unsubscribe: <mailto:ecartis@linux-mips.org?subject=unsubscribe%20linux-mips>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <1379411005-20829-1-git-send-email-markos.chandras@imgtec.com> <20130917104431.GB22468@linux-mips.org> <5238353B.9050001@imgtec.com> <20130917114356.GE22468@linux-mips.org>
Sender: linux-mips-bounce@linux-mips.org
User-agent: Mutt/1.5.21 (2010-09-15)
On Tue, Sep 17, 2013 at 01:43:56PM +0200, Ralf Baechle wrote:

> > >I'd prefer if we change the caller otherwise depending on the platform
> > >a single cache flush might involve several preempt_disable/-enable
> > >invocations.  Something like below.
> > >
> > >And it also keeps the header file more usable outside the core kernel
> > >which Florian's recent zboot a little easier.
> > >
> > 
> > Hi Ralf,
> > 
> > Changing the caller instead of the function in the header file looks
> > good to me. Thanks for fixing it.
> 
> I think in the end the patch below is the better way of fixing it.

No, it's not.  Most systems have identical caches for all processors
in a system but there are exceptions, so my first patch is the right
one.

  Ralf

<Prev in Thread] Current Thread [Next in Thread>