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[PATCH] MIPS: Fix errata for some 1074K cores.

To: linux-mips@linux-mips.org
Subject: [PATCH] MIPS: Fix errata for some 1074K cores.
From: "Steven J. Hill" <Steven.Hill@imgtec.com>
Date: Wed, 11 Sep 2013 15:01:48 -0500
Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>, ralf@linux-mips.org, "Steven J. Hill" <Steven.Hill@imgtec.com>
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From: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>

Fixes errata E16 for some problems on 1074K cores.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
---
 arch/mips/mm/c-r4k.c |   12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index f749f68..8d3ed32 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -786,12 +786,12 @@ static inline void alias_74k_erratum(struct cpuinfo_mips 
*c)
         * aliases. In this case it is better to treat the cache as always
         * having aliases.
         */
-       if ((c->processor_id & 0xff) <= PRID_REV_ENCODE_332(2, 4, 0))
-               c->dcache.flags |= MIPS_CACHE_VTAG;
-       if ((c->processor_id & 0xff) == PRID_REV_ENCODE_332(2, 4, 0))
-               write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND);
-       if (((c->processor_id & 0xff00) == PRID_IMP_1074K) &&
-           ((c->processor_id & 0xff) <= PRID_REV_ENCODE_332(1, 1, 0))) {
+       if ((c->processor_id & 0xff00) != PRID_IMP_1074K) {
+               if ((c->processor_id & 0xff) <= PRID_REV_ENCODE_332(2, 4, 0))
+                       c->dcache.flags |= MIPS_CACHE_VTAG;
+               if ((c->processor_id & 0xff) == PRID_REV_ENCODE_332(2, 4, 0))
+                       write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND);
+       } else if ((c->processor_id & 0xff) <= PRID_REV_ENCODE_332(1, 1, 0)) {
                c->dcache.flags |= MIPS_CACHE_VTAG;
                write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND);
        }
-- 
1.7.9.5


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