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[PATCH v2 2/3] MIPS: ralink: mt7620: add wdt clock definition

To: Ralf Baechle <ralf@linux-mips.org>
Subject: [PATCH v2 2/3] MIPS: ralink: mt7620: add wdt clock definition
From: Gabor Juhos <juhosg@openwrt.org>
Date: Fri, 23 Aug 2013 08:31:31 +0200
Cc: linux-mips@linux-mips.org, John Crispin <blogic@openwrt.org>, Gabor Juhos <juhosg@openwrt.org>
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From: John Crispin <blogic@openwrt.org>

The watchdog driver of the SoC uses the clk API to
get the clock associated with the watchdog device.
However the MT7620 specific setup code does not
register a clock for the watchdog device yet which
leads to the following error:

  rt2880_wdt: probe of 10000120.watchdog failed with error -2

Register a clock device for the watchdog in order to
avoid the error and make the watchdog usable.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
---
Changes since v1:
  - rebase against the mips-for-linux-next branch of the
    upstream-sfr.git tree

This makes the following patch obsolete:
  https://patchwork.linux-mips.org/patch/5673/
---
 arch/mips/ralink/mt7620.c |    1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c
index 8dd3b0d..6c37c9d 100644
--- a/arch/mips/ralink/mt7620.c
+++ b/arch/mips/ralink/mt7620.c
@@ -316,6 +316,7 @@ void __init ralink_clk_init(void)
 
        ralink_clk_add("cpu", cpu_rate);
        ralink_clk_add("10000100.timer", periph_rate);
+       ralink_clk_add("10000120.watchdog", periph_rate);
        ralink_clk_add("10000500.uart", periph_rate);
        ralink_clk_add("10000c00.uartlite", periph_rate);
 }
-- 
1.7.10

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