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[PATCH V2 1/4] MIPS: lantiq: fix dma burst length setting

To: Ralf Baechle <ralf@linux-mips.org>
Subject: [PATCH V2 1/4] MIPS: lantiq: fix dma burst length setting
From: John Crispin <blogic@openwrt.org>
Date: Thu, 8 Aug 2013 13:50:14 +0200
Cc: linux-mips@linux-mips.org, John Crispin <blogic@openwrt.org>
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The current code uses a BIT() operation which is wrong.

Comparing the upstream code with the Lantiq UGW kernel we see that burst length
should be set to 4 bytes.

Signed-off-by: John Crispin <blogic@openwrt.org>
---
Changes in V2:
* dont use BIT()

 arch/mips/lantiq/xway/dma.c |    6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/mips/lantiq/xway/dma.c b/arch/mips/lantiq/xway/dma.c
index 08f7ebd..c99b129 100644
--- a/arch/mips/lantiq/xway/dma.c
+++ b/arch/mips/lantiq/xway/dma.c
@@ -48,7 +48,8 @@
 #define DMA_IRQ_ACK            0x7e            /* IRQ status register */
 #define DMA_POLL               BIT(31)         /* turn on channel polling */
 #define DMA_CLK_DIV4           BIT(6)          /* polling clock divider */
-#define DMA_2W_BURST           BIT(1)          /* 2 word burst length */
+#define DMA_4W_BURST           2               /* 4 word burst length */
+#define DMA_2W_BURST           1               /* 2 word burst length */
 #define DMA_MAX_CHANNEL                20              /* the soc has 20 
channels */
 #define DMA_ETOP_ENDIANNESS    (0xf << 8) /* endianness swap etop channels */
 #define DMA_WEIGHT     (BIT(17) | BIT(16))     /* default channel wheight */
@@ -196,7 +197,8 @@ ltq_dma_init_port(int p)
                 * Tell the DMA engine to swap the endianness of data frames and
                 * drop packets if the channel arbitration fails.
                 */
-               ltq_dma_w32_mask(0, DMA_ETOP_ENDIANNESS | DMA_PDEN,
+               ltq_dma_w32_mask(0, (DMA_4W_BURST << 4) | (DMA_4W_BURST << 2) |
+                       DMA_ETOP_ENDIANNESS | DMA_PDEN,
                        LTQ_DMA_PCTRL);
                break;
 
-- 
1.7.10.4


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