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Re: [PATCH V2] MIPS: BMIPS: fix compilation for BMIPS5000

To: Ralf Baechle <ralf@linux-mips.org>
Subject: Re: [PATCH V2] MIPS: BMIPS: fix compilation for BMIPS5000
From: Jonas Gorski <jogo@openwrt.org>
Date: Thu, 1 Aug 2013 16:14:43 +0200
Cc: linux-mips@linux-mips.org, John Crispin <blogic@openwrt.org>, Florian Fainelli <florian@openwrt.org>, Kevin Cernekee <cernekee@gmail.com>
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On Thu, Aug 1, 2013 at 3:55 PM, Ralf Baechle <ralf@linux-mips.org> wrote:
> On Thu, Aug 01, 2013 at 11:55:38AM +0200, Jonas Gorski wrote:
>
>> Commit 02b849f7613003fe5f9e58bf233d49b0ebd4a5e8 ("MIPS: Get rid of the
>> use of .macro in C code.") replaced the macro usage but missed
>> the accessors in bmips.h, causing the following build error:
>>
>>   CC      arch/mips/kernel/smp-bmips.o
>> {standard input}: Assembler messages:
>> {standard input}:951: Error: Unrecognized opcode `_ssnop'
>> {standard input}:952: Error: Unrecognized opcode `_ssnop'
>> (...)
>> make[6]: *** [arch/mips/kernel/smp-bmips.o] Error 1
>>
>> Fix this by also replacing the macros here, fixing the last occurrence
>> in mips.
>
> How about getting rid of the entire inline assembler code by something
> like below patch?

It certainly does look neater. One small issue though ...

>  arch/mips/include/asm/bmips.h | 56 
> ++++++++++++++++++-------------------------
>  1 file changed, 23 insertions(+), 33 deletions(-)
>
> diff --git a/arch/mips/include/asm/bmips.h b/arch/mips/include/asm/bmips.h
> index 552a65a..6483d26 100644
> --- a/arch/mips/include/asm/bmips.h
> +++ b/arch/mips/include/asm/bmips.h
> @@ -13,6 +13,7 @@
>  #include <linux/compiler.h>
>  #include <linux/linkage.h>
>  #include <asm/addrspace.h>
> +#include <asm/r4kcache.h>
>  #include <asm/mipsregs.h>
>  #include <asm/hazards.h>
>
> @@ -65,44 +66,33 @@ static inline unsigned long bmips_read_zscm_reg(unsigned 
> int offset)
>  {
>         unsigned long ret;
>
> -       __asm__ __volatile__(
> -               ".set push\n"
> -               ".set noreorder\n"
> -               "cache %1, 0(%2)\n"
> -               "sync\n"
> -               "_ssnop\n"
> -               "_ssnop\n"
> -               "_ssnop\n"
> -               "_ssnop\n"
> -               "_ssnop\n"
> -               "_ssnop\n"
> -               "_ssnop\n"
> -               "mfc0 %0, $28, 3\n"
> -               "_ssnop\n"
> -               ".set pop\n"
> -               : "=&r" (ret)
> -               : "i" (Index_Load_Tag_S), "r" (ZSCM_REG_BASE + offset)
> -               : "memory");
> +       barrier();
> +       cache_op(Index_Load_Tag_S, ZSCM_REG_BASE + offset);
> +       __sync();
> +       __ssnop();
> +       __ssnop();
> +       __ssnop();
> +       __ssnop();
> +       __ssnop();
> +       __ssnop();
> +       __ssnop();
> +       ret = read_c0_ddatalo();
> +       __ssnop();
> +
>         return ret;
>  }
>
>  static inline void bmips_write_zscm_reg(unsigned int offset, unsigned long 
> data)
>  {
> -       __asm__ __volatile__(
> -               ".set push\n"
> -               ".set noreorder\n"
> -               "mtc0 %0, $28, 3\n"
> -               "_ssnop\n"
> -               "_ssnop\n"
> -               "_ssnop\n"
> -               "cache %1, 0(%2)\n"
> -               "_ssnop\n"
> -               "_ssnop\n"
> -               "_ssnop\n"
> -               : /* no outputs */
> -               : "r" (data),
> -                 "i" (Index_Store_Tag_S), "r" (ZSCM_REG_BASE + offset)
> -               : "memory");
> +       write_c0_ddatalo(3);

I guess this needs to be write_c0_ddatalo(data);

> +       __ssnop();
> +       __ssnop();
> +       __ssnop();
> +       cache_op(Index_Store_Tag_S, ZSCM_REG_BASE + offset);
> +       __ssnop();
> +       __ssnop();
> +       __ssnop();
> +       barrier();
>  }
>
>  #endif /* !defined(__ASSEMBLY__) */
>

Kevin or Florian, can you comment on this?


Regards
Jonas

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