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[PATCH 0/5] MIPS: Add support for OCTEON III based SoCs.

To: linux-mips@linux-mips.org, ralf@linux-mips.org
Subject: [PATCH 0/5] MIPS: Add support for OCTEON III based SoCs.
From: David Daney <ddaney.cavm@gmail.com>
Date: Mon, 29 Jul 2013 15:06:59 -0700
Cc: David Daney <david.daney@cavium.com>
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From: David Daney <david.daney@cavium.com>

These patches add minimal support for SoCs in the OCTEON III family.
In many respects, they are similar to OCTEON II, but with larger cache
and FPU.  FPU support comes later...

David Daney (5):
  MIPS: Add CPU identifiers for more OCTEON family members.
  MIPS: Probe for new OCTEON CPU/SoC types.
  MIPS: Use r4k_wait for OCTEON3 CPUs.
  MIPS: Generate OCTEON3 TLB handlers with the same features as
    OCTEON2.
  MIPS: OCTEON: Set L1 cache parameters for OCTEON3 CPUs.

 arch/mips/include/asm/cpu.h  |  5 ++++-
 arch/mips/kernel/cpu-probe.c |  7 +++++++
 arch/mips/kernel/idle.c      |  1 +
 arch/mips/mm/c-octeon.c      | 14 ++++++++++++++
 arch/mips/mm/tlbex.c         |  2 ++
 5 files changed, 28 insertions(+), 1 deletion(-)

-- 
1.7.11.7


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