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[PATCH] MIPS: sead3: Disable L2 cache on SEAD-3.

To: linux-mips@linux-mips.org
Subject: [PATCH] MIPS: sead3: Disable L2 cache on SEAD-3.
From: "Steven J. Hill" <Steven.Hill@imgtec.com>
Date: Thu, 27 Jun 2013 11:27:59 -0500
Cc: "Steven J. Hill" <Steven.Hill@imgtec.com>, ralf@linux-mips.org
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From: "Steven J. Hill" <Steven.Hill@imgtec.com>

The cores used on the SEAD-3 platform do not have L2 caches, so
this option should not be turned on. Originally fixed on public
'linux-mti-3.8' release branch.

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
(cherry picked from commit deb520377f74b352cc606099ca640c329a73bacb)
---
 arch/mips/Kconfig |    1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 8f5e646..d45fd99 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -342,7 +342,6 @@ config MIPS_SEAD3
        select DMA_NONCOHERENT
        select IRQ_CPU
        select IRQ_GIC
-       select MIPS_CPU_SCACHE
        select MIPS_MSC
        select SYS_HAS_CPU_MIPS32_R1
        select SYS_HAS_CPU_MIPS32_R2
-- 
1.7.9.5


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