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Re: [PATCH V10 06/13] MIPS: Loongson 3: Add HT-linked PCI support

To: "Andreas Barth" <aba@ayous.org>
Subject: Re: [PATCH V10 06/13] MIPS: Loongson 3: Add HT-linked PCI support
From: chenhc@lemote.com
Date: Sun, 23 Jun 2013 10:05:39 +0800
Cc: "Ralf Baechle" <ralf@linux-mips.org>, "John Crispin" <john@phrozen.org>, linux-mips@linux-mips.org, "Fuxin Zhang" <zhangfx@lemote.com>, "Zhangjin Wu" <wuzhangjin@gmail.com>, "Hongliang Tao" <taohl@lemote.com>, "Hua Yan" <yanh@lemote.com>
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References: <1366030028-5084-1-git-send-email-chenhc@lemote.com> <1366030028-5084-7-git-send-email-chenhc@lemote.com> <20130622130914.GC19237@mails.so.argh.org>
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> * Huacai Chen (chenhc@lemote.com) [130415 14:49]:
>> Loongson family machines use Hyper-Transport bus for inter-core
>> connection and device connection. The PCI bus is a subordinate
>> linked at HT1.
>>
>> With UEFI-like firmware interface, We don't need fixup for PCI irq
>> routing.
>
> ops-loongson3 looks to my untrained eyes much like ops-loongson2.
> Would it be possible to merge the two (without useing #ifdef)?

ops-loongson2.c has some #ifdef at present. And Loongson-3 will support
more chipsets than now, so ops-loongson2 and ops-loongson3 will have more
differences in future.

>
>
> Andi
>



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