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[PATCH 1/7] MIPS: sibyte: Fix build for SIBYTE_BW_TRACE

To: <linux-mips@linux-mips.org>
Subject: [PATCH 1/7] MIPS: sibyte: Fix build for SIBYTE_BW_TRACE
From: Markos Chandras <markos.chandras@imgtec.com>
Date: Mon, 17 Jun 2013 15:00:35 +0100
Cc: Markos Chandras <markos.chandras@imgtec.com>, <sibyte-users@bitmover.com>
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The M_BCM1480_SCD_TRACE_CFG_FREEZE macro removed in
8deab1144b553548fb2f1b51affdd36dcd652aaa
"[MIPS] Updated Sibyte headers"

This broke the build for the sibyte platfrom when
SIBYTE_BW_TRACE is enabled:
arch/mips/mm/cerr-sb1.c:186:2: error: 'M_BCM1480_SCD_TRACE_CFG_FREEZE'
undeclared (first use in this function)

We fix this by replacing it with the M_BCM1480_SYS_RESERVED4 macro

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Acked-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: sibyte-users@bitmover.com
---
 arch/mips/mm/cerr-sb1.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/mips/mm/cerr-sb1.c b/arch/mips/mm/cerr-sb1.c
index 576add3..1a24534 100644
--- a/arch/mips/mm/cerr-sb1.c
+++ b/arch/mips/mm/cerr-sb1.c
@@ -183,7 +183,7 @@ asmlinkage void sb1_cache_error(void)
 #ifdef CONFIG_SIBYTE_BW_TRACE
        /* Freeze the trace buffer now */
 #if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
-       csr_out32(M_BCM1480_SCD_TRACE_CFG_FREEZE, IOADDR(A_SCD_TRACE_CFG));
+       csr_out32(M_BCM1480_SYS_RESERVED4, IOADDR(A_SCD_TRACE_CFG));
 #else
        csr_out32(M_SCD_TRACE_CFG_FREEZE, IOADDR(A_SCD_TRACE_CFG));
 #endif
-- 
1.8.2.1



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