linux-mips
[Top] [All Lists]

[PATCH] MIPS: tlbex: flush the correct ranges in insn_fixup

To: linux-mips@linux-mips.org
Subject: [PATCH] MIPS: tlbex: flush the correct ranges in insn_fixup
From: Jonas Gorski <jogo@openwrt.org>
Date: Thu, 9 May 2013 17:22:01 +0200
Cc: Ralf Baechle <ralf@linux-mips.org>, "Steven J. Hill" <Steven.Hill@imgtec.com>, David Daney <david.daney@cavium.com>, John Crispin <blogic@openwrt.org>
List-archive: <http://www.linux-mips.org/archives/linux-mips/>
List-help: <mailto:ecartis@linux-mips.org?Subject=help>
List-id: linux-mips <linux-mips.eddie.linux-mips.org>
List-owner: <mailto:ralf@linux-mips.org>
List-post: <mailto:linux-mips@linux-mips.org>
List-software: Ecartis version 1.0.0
List-subscribe: <mailto:ecartis@linux-mips.org?subject=subscribe%20linux-mips>
List-unsubscribe: <mailto:ecartis@linux-mips.org?subject=unsubscribe%20linux-mips>
Original-recipient: rfc822;linux-mips@linux-mips.org
Sender: linux-mips-bounce@linux-mips.org
local_flush_icache_range flushed whereever *stop was pointing to, which
might not necessarily be a valid memory address. This caused TLB misses
at least on BCM63XX, failing early.

Instead move the local_flush_icache_range into the loop as it was
probably intended so it will flush each modified instruction's address.

This breakage was introduced with d532f3d26716a39dfd4b88d687bd344fbe77e390
("MIPS: Allow ASID size to be determined at boot time.").

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
---
 arch/mips/mm/tlbex.c |    3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index a188d42..4d46d37 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -332,8 +332,9 @@ static void __cpuinit insn_fixup(unsigned int **start, 
unsigned int **stop,
                        *ip = i_const;
                }
 #endif
+               local_flush_icache_range((unsigned long)ip,
+                                        (unsigned long)ip + sizeof(*ip));
        }
-       local_flush_icache_range((unsigned long)*p, (unsigned long)((*p) + 1));
 }
 
 #define asid_insn_fixup(section, const)                                        
\
-- 
1.7.10.4


<Prev in Thread] Current Thread [Next in Thread>
  • [PATCH] MIPS: tlbex: flush the correct ranges in insn_fixup, Jonas Gorski <=