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Re: [PATCH] MIPS: Enable interrupts before WAIT instruction.

To: David Daney <ddaney.cavm@gmail.com>
Subject: Re: [PATCH] MIPS: Enable interrupts before WAIT instruction.
From: Thomas Gleixner <tglx@linutronix.de>
Date: Thu, 2 May 2013 23:04:19 +0200 (CEST)
Cc: linux-mips@linux-mips.org, ralf@linux-mips.org, Linus Torvalds <torvalds@linux-foundation.org>, linux-kernel@vger.kernel.org, David Daney <david.daney@cavium.com>, Jonas Gorski <jogo@openwrt.org>
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On Thu, 2 May 2013, David Daney wrote:

> From: David Daney <david.daney@cavium.com>
> 
> As noted by Thomas Gleixner:
> 
>    commit cdbedc61c8 (mips: Use generic idle loop) broke MIPS as I did
>    not realize that MIPS wants to invoke the wait instructions with
>    interrupts enabled.
> 
> Instead of enabling interrupts in arch_cpu_idle() as Thomas' initial
> patch does, we follow Linus' suggestion of doing it in the assembly
> code to prevent the compiler from rearranging things.

Yeah, that looks way more sane.

 
> Signed-off-by: David Daney <david.daney@cavium.com>
> Reported-by: EunBong Song <eunb.song@samsung.com>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Cc: Jonas Gorski <jogo@openwrt.org>
> ---
> 
> This is only very lightly tested, we need more testing before
> declaring it the definitive fix.
> 
>  arch/mips/kernel/genex.S | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
> index ecb347c..57cda9a 100644
> --- a/arch/mips/kernel/genex.S
> +++ b/arch/mips/kernel/genex.S
> @@ -132,12 +132,13 @@ LEAF(r4k_wait)
>       .set    noreorder
>       /* start of rollback region */
>       LONG_L  t0, TI_FLAGS($28)
> -     nop
>       andi    t0, _TIF_NEED_RESCHED
>       bnez    t0, 1f
>        nop
> -     nop
> -     nop
> +     /* Enable interrupts so WAIT will complete */
> +     mfc0    t0, CP0_STATUS
> +     ori     t0, ST0_IE
> +     mtc0    t0, CP0_STATUS
>       .set    mips3
>       wait
>       /* end of rollback region (the region size must be power of two) */
> -- 
> 1.7.11.7
> 
> 

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