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Re: [PATCH V2 05/16] MIPS: ralink: add RT3352 usb register defines

To: John Crispin <blogic@openwrt.org>
Subject: Re: [PATCH V2 05/16] MIPS: ralink: add RT3352 usb register defines
From: Gabor Juhos <juhosg@openwrt.org>
Date: Fri, 12 Apr 2013 10:47:58 +0200
Cc: Ralf Baechle <ralf@linux-mips.org>, linux-mips@linux-mips.org
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2013.04.12. 9:27 keltezéssel, John Crispin írta:
> Add a few missing defines that are needed to make USB work on the RT3352
> and RT5350.

This is not fully correct. This change contains definitions which are not
related to USB at all and those are used by a previous patch. You said that you
will reorder the patches, but please change the log as well when you are doing 
that.

-Gabor

> 
> Signed-off-by: John Crispin <blogic@openwrt.org>
> ---
>  arch/mips/include/asm/mach-ralink/rt305x.h |   13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/arch/mips/include/asm/mach-ralink/rt305x.h 
> b/arch/mips/include/asm/mach-ralink/rt305x.h
> index 4e62cef..80cda8a 100644
> --- a/arch/mips/include/asm/mach-ralink/rt305x.h
> +++ b/arch/mips/include/asm/mach-ralink/rt305x.h
> @@ -144,4 +144,17 @@ static inline int soc_is_rt5350(void)
>  #define RT305X_GPIO_MODE_SDRAM               BIT(8)
>  #define RT305X_GPIO_MODE_RGMII               BIT(9)
>  
> +#define RT3352_SYSC_REG_SYSCFG0              0x010
> +#define RT3352_SYSC_REG_SYSCFG1         0x014
> +#define RT3352_SYSC_REG_CLKCFG1         0x030
> +#define RT3352_SYSC_REG_RSTCTRL         0x034
> +#define RT3352_SYSC_REG_USB_PS          0x05c
> +
> +#define RT3352_CLKCFG0_XTAL_SEL              BIT(20)
> +#define RT3352_CLKCFG1_UPHY0_CLK_EN  BIT(18)
> +#define RT3352_CLKCFG1_UPHY1_CLK_EN  BIT(20)
> +#define RT3352_RSTCTRL_UHST          BIT(22)
> +#define RT3352_RSTCTRL_UDEV          BIT(25)
> +#define RT3352_SYSCFG1_USB0_HOST_MODE        BIT(10)
> +
>  #endif
> 


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