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[PATCH 05/18] MIPS: ralink: add RT3352 usb register defines

To: Ralf Baechle <ralf@linux-mips.org>
Subject: [PATCH 05/18] MIPS: ralink: add RT3352 usb register defines
From: John Crispin <blogic@openwrt.org>
Date: Wed, 10 Apr 2013 13:47:14 +0200
Cc: Gabor Juhos <juhosg@openwrt.org>, linux-mips@linux-mips.org, John Crispin <blogic@openwrt.org>
In-reply-to: <1365594447-13068-1-git-send-email-blogic@openwrt.org>
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Add a few missing defines that are needed to make USB work on the RT3352
and RT5350.

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 arch/mips/include/asm/mach-ralink/rt305x.h |   11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/mips/include/asm/mach-ralink/rt305x.h 
b/arch/mips/include/asm/mach-ralink/rt305x.h
index 4e62cef..0e50692 100644
--- a/arch/mips/include/asm/mach-ralink/rt305x.h
+++ b/arch/mips/include/asm/mach-ralink/rt305x.h
@@ -144,4 +144,15 @@ static inline int soc_is_rt5350(void)
 #define RT305X_GPIO_MODE_SDRAM         BIT(8)
 #define RT305X_GPIO_MODE_RGMII         BIT(9)
 
+#define RT3352_SYSC_REG_SYSCFG1         0x014
+#define RT3352_SYSC_REG_CLKCFG1         0x030
+#define RT3352_SYSC_REG_RSTCTRL         0x034
+#define RT3352_SYSC_REG_USB_PS          0x05c
+
+#define RT3352_CLKCFG1_UPHY0_CLK_EN    BIT(18)
+#define RT3352_CLKCFG1_UPHY1_CLK_EN    BIT(20)
+#define RT3352_RSTCTRL_UHST            BIT(22)
+#define RT3352_RSTCTRL_UDEV            BIT(25)
+#define RT3352_SYSCFG1_USB0_HOST_MODE  BIT(10)
+
 #endif
-- 
1.7.10.4


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