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Re: [PATCH 04/11] MIPS: ath79: add IRQ handling code for the QCA955X SoC

To: John Crispin <blogic@openwrt.org>
Subject: Re: [PATCH 04/11] MIPS: ath79: add IRQ handling code for the QCA955X SoCs
From: Gabor Juhos <juhosg@openwrt.org>
Date: Fri, 15 Feb 2013 18:26:44 +0100
Cc: Ralf Baechle <ralf@linux-mips.org>, linux-mips <linux-mips@linux-mips.org>, "Rodriguez, Luis" <rodrigue@qca.qualcomm.com>, "Giori, Kathy" <kgiori@qca.qualcomm.com>, QCA Linux Team <qca-linux-team@qca.qualcomm.com>
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2013.02.15. 17:01 keltezéssel, John Crispin írta:
> 
>>
>>       if (soc_is_ar71xx() || soc_is_ar913x())
>>           ath79_misc_irq_chip.irq_mask_ack = ar71xx_misc_irq_mask;
>> -    else if (soc_is_ar724x() || soc_is_ar933x() || soc_is_ar934x())
>> +    else if (soc_is_ar724x() ||
>> +         soc_is_ar933x() ||
>> +         soc_is_ar934x() ||
>> +         soc_is_qca955x())
>>           ath79_misc_irq_chip.irq_ack = ar724x_misc_irq_ack;
> Hi,
> 
> the list is getting long. not a blocker but might be worth thinking of a
> different way to solve the different revisions of the irq core

This code runs only once, so it is not worth the effort IMHO.

If I would introduce a table to store the revision of the IRQ core, I would have
to put a value into that for each different SoC. That means 15 entries at the
moment.

Alternatively I can introduce a global variable to store the revision, and
intialize that variable from the SoC detection code. However I would have to set
that variable individually for each SoC and that means 15 lines of code.


>> +    if (status&  QCA955X_EXT_INT_USB1) {
>> +        /* TODO: flush DDR? */
>> +        generic_handle_irq(ATH79_IP3_IRQ(0));
>> +    }
>> +
>> +    if (status&  QCA955X_EXT_INT_USB2) {
>> +        /* TODO: flsuh DDR? */
>> +        generic_handle_irq(ATH79_IP3_IRQ(1));
>> +    }
> 
> flsuh typo

Yep, will fix it.

Thanks,
Gabor

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