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[PATCH 08/11] MIPS: ath79: add WMAC registration code for the QCA955X So

To: Ralf Baechle <ralf@linux-mips.org>
Subject: [PATCH 08/11] MIPS: ath79: add WMAC registration code for the QCA955X SoCs
From: Gabor Juhos <juhosg@openwrt.org>
Date: Fri, 15 Feb 2013 15:38:22 +0100
Cc: John Crispin <blogic@openwrt.org>, linux-mips <linux-mips@linux-mips.org>, Gabor Juhos <juhosg@openwrt.org>, "Rodriguez, Luis" <rodrigue@qca.qualcomm.com>, "Giori, Kathy" <kgiori@qca.qualcomm.com>, QCA Linux Team <qca-linux-team@qca.qualcomm.com>
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The SoC has a built-in wireless MAC. Register a platform
device for that to make it usable with the ath9k driver.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
---
 arch/mips/ath79/Kconfig                        |    2 +-
 arch/mips/ath79/dev-wmac.c                     |   20 ++++++++++++++++++++
 arch/mips/include/asm/mach-ath79/ar71xx_regs.h |    3 +++
 3 files changed, 24 insertions(+), 1 deletion(-)

diff --git a/arch/mips/ath79/Kconfig b/arch/mips/ath79/Kconfig
index cffdc8e..77926e3 100644
--- a/arch/mips/ath79/Kconfig
+++ b/arch/mips/ath79/Kconfig
@@ -108,7 +108,7 @@ config ATH79_DEV_USB
        def_bool n
 
 config ATH79_DEV_WMAC
-       depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X)
+       depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA955X)
        def_bool n
 
 endif
diff --git a/arch/mips/ath79/dev-wmac.c b/arch/mips/ath79/dev-wmac.c
index 4f6c4e3..3e00c09 100644
--- a/arch/mips/ath79/dev-wmac.c
+++ b/arch/mips/ath79/dev-wmac.c
@@ -116,6 +116,24 @@ static void ar934x_wmac_setup(void)
                ath79_wmac_data.is_clk_25mhz = true;
 }
 
+static void qca955x_wmac_setup(void)
+{
+       u32 t;
+
+       ath79_wmac_device.name = "qca955x_wmac";
+
+       ath79_wmac_resources[0].start = QCA955X_WMAC_BASE;
+       ath79_wmac_resources[0].end = QCA955X_WMAC_BASE + QCA955X_WMAC_SIZE - 1;
+       ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1);
+       ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1);
+
+       t = ath79_reset_rr(QCA955X_RESET_REG_BOOTSTRAP);
+       if (t & QCA955X_BOOTSTRAP_REF_CLK_40)
+               ath79_wmac_data.is_clk_25mhz = false;
+       else
+               ath79_wmac_data.is_clk_25mhz = true;
+}
+
 void __init ath79_register_wmac(u8 *cal_data)
 {
        if (soc_is_ar913x())
@@ -124,6 +142,8 @@ void __init ath79_register_wmac(u8 *cal_data)
                ar933x_wmac_setup();
        else if (soc_is_ar934x())
                ar934x_wmac_setup();
+       else if (soc_is_qca955x())
+               qca955x_wmac_setup();
        else
                BUG();
 
diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h 
b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
index bf50ddf..4728212 100644
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -94,6 +94,9 @@
 #define AR934X_SRIF_BASE       (AR71XX_APB_BASE + 0x00116000)
 #define AR934X_SRIF_SIZE       0x1000
 
+#define QCA955X_WMAC_BASE      (AR71XX_APB_BASE + 0x00100000)
+#define QCA955X_WMAC_SIZE      0x20000
+
 /*
  * DDR_CTRL block
  */
-- 
1.7.10


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