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[PATCH 3/5] MIPS: ath79: move global PCI defines into a common header

To: Ralf Baechle <ralf@linux-mips.org>
Subject: [PATCH 3/5] MIPS: ath79: move global PCI defines into a common header
From: Gabor Juhos <juhosg@openwrt.org>
Date: Sat, 2 Feb 2013 13:44:23 +0100
Cc: linux-mips <linux-mips@linux-mips.org>, John Crispin <blogic@openwrt.org>, Gabor Juhos <juhosg@openwrt.org>
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The constants will be used by a subsequent patch.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
---
 arch/mips/include/asm/mach-ath79/ar71xx_regs.h |   24 ++++++++++++++++++++++++
 arch/mips/pci/pci-ar71xx.c                     |   16 ----------------
 arch/mips/pci/pci-ar724x.c                     |    8 --------
 3 files changed, 24 insertions(+), 24 deletions(-)

diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h 
b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
index 7d44b5d..7c87bfe 100644
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -41,11 +41,35 @@
 #define AR71XX_RESET_BASE      (AR71XX_APB_BASE + 0x00060000)
 #define AR71XX_RESET_SIZE      0x100
 
+#define AR71XX_PCI_MEM_BASE    0x10000000
+#define AR71XX_PCI_MEM_SIZE    0x07000000
+
+#define AR71XX_PCI_WIN0_OFFS   0x10000000
+#define AR71XX_PCI_WIN1_OFFS   0x11000000
+#define AR71XX_PCI_WIN2_OFFS   0x12000000
+#define AR71XX_PCI_WIN3_OFFS   0x13000000
+#define AR71XX_PCI_WIN4_OFFS   0x14000000
+#define AR71XX_PCI_WIN5_OFFS   0x15000000
+#define AR71XX_PCI_WIN6_OFFS   0x16000000
+#define AR71XX_PCI_WIN7_OFFS   0x07000000
+
+#define AR71XX_PCI_CFG_BASE    \
+       (AR71XX_PCI_MEM_BASE + AR71XX_PCI_WIN7_OFFS + 0x10000)
+#define AR71XX_PCI_CFG_SIZE    0x100
+
 #define AR7240_USB_CTRL_BASE   (AR71XX_APB_BASE + 0x00030000)
 #define AR7240_USB_CTRL_SIZE   0x100
 #define AR7240_OHCI_BASE       0x1b000000
 #define AR7240_OHCI_SIZE       0x1000
 
+#define AR724X_PCI_MEM_BASE    0x10000000
+#define AR724X_PCI_MEM_SIZE    0x04000000
+
+#define AR724X_PCI_CFG_BASE    0x14000000
+#define AR724X_PCI_CFG_SIZE    0x1000
+#define AR724X_PCI_CTRL_BASE   (AR71XX_APB_BASE + 0x000f0000)
+#define AR724X_PCI_CTRL_SIZE   0x100
+
 #define AR724X_EHCI_BASE       0x1b000000
 #define AR724X_EHCI_SIZE       0x1000
 
diff --git a/arch/mips/pci/pci-ar71xx.c b/arch/mips/pci/pci-ar71xx.c
index 0d8412f..35ee234 100644
--- a/arch/mips/pci/pci-ar71xx.c
+++ b/arch/mips/pci/pci-ar71xx.c
@@ -25,22 +25,6 @@
 #include <asm/mach-ath79/ath79.h>
 #include <asm/mach-ath79/pci.h>
 
-#define AR71XX_PCI_MEM_BASE    0x10000000
-#define AR71XX_PCI_MEM_SIZE    0x07000000
-
-#define AR71XX_PCI_WIN0_OFFS           0x10000000
-#define AR71XX_PCI_WIN1_OFFS           0x11000000
-#define AR71XX_PCI_WIN2_OFFS           0x12000000
-#define AR71XX_PCI_WIN3_OFFS           0x13000000
-#define AR71XX_PCI_WIN4_OFFS           0x14000000
-#define AR71XX_PCI_WIN5_OFFS           0x15000000
-#define AR71XX_PCI_WIN6_OFFS           0x16000000
-#define AR71XX_PCI_WIN7_OFFS           0x07000000
-
-#define AR71XX_PCI_CFG_BASE            \
-       (AR71XX_PCI_MEM_BASE + AR71XX_PCI_WIN7_OFFS + 0x10000)
-#define AR71XX_PCI_CFG_SIZE            0x100
-
 #define AR71XX_PCI_REG_CRP_AD_CBE      0x00
 #define AR71XX_PCI_REG_CRP_WRDATA      0x04
 #define AR71XX_PCI_REG_CRP_RDDATA      0x08
diff --git a/arch/mips/pci/pci-ar724x.c b/arch/mips/pci/pci-ar724x.c
index e7aca88b..b3f9d09 100644
--- a/arch/mips/pci/pci-ar724x.c
+++ b/arch/mips/pci/pci-ar724x.c
@@ -17,14 +17,6 @@
 #include <asm/mach-ath79/ar71xx_regs.h>
 #include <asm/mach-ath79/pci.h>
 
-#define AR724X_PCI_CFG_BASE    0x14000000
-#define AR724X_PCI_CFG_SIZE    0x1000
-#define AR724X_PCI_CTRL_BASE   (AR71XX_APB_BASE + 0x000f0000)
-#define AR724X_PCI_CTRL_SIZE   0x100
-
-#define AR724X_PCI_MEM_BASE    0x10000000
-#define AR724X_PCI_MEM_SIZE    0x04000000
-
 #define AR724X_PCI_REG_RESET           0x18
 #define AR724X_PCI_REG_INT_STATUS      0x4c
 #define AR724X_PCI_REG_INT_MASK                0x50
-- 
1.7.10


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