[PATCH] MIPS: Probe for and report hardware virtualization support.

[David Daney <ddaney.cavm@gmail.com>]

From: David Daney <david.daney@cavium.com>

The presence of the MIPS Virtualization Application-Specific Extension
is indicated by CP0_Config3[23].  Probe for this and report it in
/proc/cpuinfo.

Signed-off-by: David Daney <david.daney@cavium.com>
---
 arch/mips/include/asm/cpu-features.h | 4 ++++
 arch/mips/include/asm/cpu.h          | 2 +-
 arch/mips/include/asm/mipsregs.h     | 1 +
 arch/mips/kernel/cpu-probe.c         | 2 ++
 arch/mips/kernel/proc.c              | 1 +
 5 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/arch/mips/include/asm/cpu-features.h 
b/arch/mips/include/asm/cpu-features.h
index 1e83b24..e4bce0b 100644
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -273,4 +273,8 @@
 #define cpu_has_perf_cntr_intr_bit     (cpu_data[0].options & MIPS_CPU_PCI)
 #endif
 
+#ifndef cpu_has_vz
+#define cpu_has_vz             (cpu_data[0].ases & MIPS_ASE_VZ)
+#endif
+
 #endif /* __ASM_CPU_FEATURES_H */
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index 9904697..cd9c223 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -333,6 +333,6 @@ enum cpu_type_enum {
 #define MIPS_ASE_DSP           0x00000010 /* Signal Processing ASE */
 #define MIPS_ASE_MIPSMT                0x00000020 /* CPU supports MIPS MT */
 #define MIPS_ASE_DSP2P         0x00000040 /* Signal Processing ASE Rev 2 */
-
+#define MIPS_ASE_VZ            0x00000080 /* Virtualization ASE */
 
 #endif /* _ASM_CPU_H */
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 2145162..b9ca9a1 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -595,6 +595,7 @@
 #define MIPS_CONF3_DSP2P       (_ULCAST_(1) << 11)
 #define MIPS_CONF3_RXI         (_ULCAST_(1) << 12)
 #define MIPS_CONF3_ULRI                (_ULCAST_(1) << 13)
+#define MIPS_CONF3_VZ          (_ULCAST_(1) << 23)
 
 #define MIPS_CONF4_MMUSIZEEXT  (_ULCAST_(255) << 0)
 #define MIPS_CONF4_MMUEXTDEF   (_ULCAST_(3) << 14)
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 2656c89..da2222e 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -467,6 +467,8 @@ static inline unsigned int decode_config3(struct 
cpuinfo_mips *c)
                c->ases |= MIPS_ASE_MIPSMT;
        if (config3 & MIPS_CONF3_ULRI)
                c->options |= MIPS_CPU_ULRI;
+       if (config3 & MIPS_CONF3_VZ)
+               c->ases |= MIPS_ASE_VZ;
 
        return config3 & MIPS_CONF_M;
 }
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index 79d4b8e..4673fa3 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -95,6 +95,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
        if (cpu_has_dsp)        seq_printf(m, "%s", " dsp");
        if (cpu_has_dsp2)       seq_printf(m, "%s", " dsp2");
        if (cpu_has_mipsmt)     seq_printf(m, "%s", " mt");
+       if (cpu_has_vz)         seq_printf(m, "%s", " vz");
        seq_printf(m, "\n");
 
        seq_printf(m, "shadow register sets\t: %d\n",
-- 
1.7.11.7