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Re: [PATCH] [RFC] Proposed changes to eliminate 'union mips_instruction'

To: "Hill, Steven" <sjhill@mips.com>, "ralf@linux-mips.org" <ralf@linux-mips.org>
Subject: Re: [PATCH] [RFC] Proposed changes to eliminate 'union mips_instruction' type.
From: David Daney <ddaney.cavm@gmail.com>
Date: Tue, 15 Jan 2013 14:39:15 -0800
Cc: "linux-mips@linux-mips.org" <linux-mips@linux-mips.org>, "cernekee@gmail.com" <cernekee@gmail.com>, "kevink@paralogos.com" <kevink@paralogos.com>
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On 01/15/2013 02:19 PM, Hill, Steven wrote:
This patch shows the use of macros in place of 'union mips_instruction'
type.

Why?  What are the benefits of doing this?

The microMIPS patches will not make it in due to the 4x size increase of this 
structure. Also, as was mentioned on the list previously by Ralf, it should 
have been done like this years back.

A matter of opinion.  Bitfields have a certain elegance

Personally I would investigate machine generating the file with the structure definitions. That way you could insure consistency between big and little endian versions.



+
+#define J_INSN(op,target)            ((op << 26) | target)

What is the type of J_INSN()?  What happens if target overflows into the
'op' field?

Jump instruction, which is evident from the code removed in the patch. The 
macros are not done, this is a prototype and bounds checking will of course be 
done for the final. I mostly wanted to see if people were happy with the macro 
names, how they are laid out in the header file and syntactical nits.


For me it is much more important that the data types be correct and the overflow conditions are handled (and perhaps also warned about).

The order in the file I don't care about.

+#define J_INSN_TARGET(insn)          (insn & 0x03ffffff)

INSN_J_TARGET ...

+#define R_INSN(op,rs,rt,rd,re,func)  ((op << 26) | (rs << 21) |      \
+                                      (rt << 16) | (rd << 11) |      \
+                                      (re << 6) | func)


#define INSN_RANGE_CHECK(v, bits) ({ \
    u32 val = (v); \
    u32 mask = (1 << bits) - 1; \
    WARN((v & mask) != v, "YOU LOSE"); \
    val; \
})

#define INSN_TYPE_R(op, rs, rt, rd, re, func) \
 ((INSN_RANGE_CHECK((op), 6) << 26 | \
  (INSN_RANGE_CHECK((rs), 5) << 21 | \
  (INSN_RANGE_CHECK((rt), 5) << 16 | \
  (INSN_RANGE_CHECK((rd), 5) << 11 | \
  (INSN_RANGE_CHECK((re), 5) << 6 | \
  (INSN_RANGE_CHECK((func), 6))

But you cannot use that as a static initializer.


+#define F_INSN(op,fmt,rt,rd,re,func) R_INSN(op,fmt,rt,rd,re,func)
+#define F_INSN_FMT(insn)             INSN_RS(insn)
+#define U_INSN(op,rs,uimm)           ((op << 26) | (rs << 21) | uimmediate)
[...]
+     unsigned int n_insn = insn.word;

I don't like that the width of an insn is not obvious by looking at the
code.

Can we, assuming we merge something like this, make it something like
u32, or insn_t?  I'm not sure which is better.

I was planning on making it a 'u32' but I am open to either one. Ralf, which 
would you prefer?

-Steve



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