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[PATCH 03/10] MIPS: PCI: Byteswap not needed in little-endian mode

To: linux-mips@linux-mips.org, ralf@linux-mips.org
Subject: [PATCH 03/10] MIPS: PCI: Byteswap not needed in little-endian mode
From: "Jayachandran C" <jchandra@broadcom.com>
Date: Mon, 14 Jan 2013 21:41:55 +0530
Cc: "Jayachandran C" <jchandra@broadcom.com>
In-reply-to: <1358179922-26663-1-git-send-email-jchandra@broadcom.com>
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Wrap the xlp_enable_pci_bswap() function and its call with
'#ifdef __BIG_ENDIAN'. On Netlogic XLP, the PCIe initialization code
to setup to byteswap is needed only in big-endian mode.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
---
 arch/mips/pci/pci-xlp.c |    4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/mips/pci/pci-xlp.c b/arch/mips/pci/pci-xlp.c
index 140557a..fe435fc 100644
--- a/arch/mips/pci/pci-xlp.c
+++ b/arch/mips/pci/pci-xlp.c
@@ -191,6 +191,7 @@ int pcibios_plat_dev_init(struct pci_dev *dev)
        return 0;
 }
 
+#ifdef __BIG_ENDIAN
 static int xlp_enable_pci_bswap(void)
 {
        uint64_t pciebase, sysbase;
@@ -224,6 +225,7 @@ static int xlp_enable_pci_bswap(void)
        }
        return 0;
 }
+#endif
 
 static int __init pcibios_init(void)
 {
@@ -235,7 +237,9 @@ static int __init pcibios_init(void)
        ioport_resource.start =  0;
        ioport_resource.end   = ~0;
 
+#ifdef __BIG_ENDIAN
        xlp_enable_pci_bswap();
+#endif
        set_io_port_base(CKSEG1);
        nlm_pci_controller.io_map_base = CKSEG1;
 
-- 
1.7.9.5



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