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[RESEND PATCH v3 5/5] MIPS: APRP (APSP): malta board support

To: <linux-mips@linux-mips.org>, <ralf@linux-mips.org>, <kevink@paralogos.com>, <macro@linux-mips.org>, <john@phrozen.org>
Subject: [RESEND PATCH v3 5/5] MIPS: APRP (APSP): malta board support
From: Deng-Cheng Zhu <dczhu@mips.com>
Date: Mon, 7 Jan 2013 10:05:14 -0800
Cc: <sjhill@mips.com>, <dczhu@mips.com>
In-reply-to: <1357581914-4589-1-git-send-email-dczhu@mips.com>
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APRP is supposed to be platform independent, however, this patch is needed
for Malta for various reasons, see code and code comments.

Cc: Steven J. Hill <sjhill@mips.com>
Signed-off-by: Deng-Cheng Zhu <dczhu@mips.com>
---
 .../include/asm/mach-malta/cpu-feature-overrides.h |    3 ++
 arch/mips/kernel/vpe-cmp.c                         |   17 +++++++++++++++
 arch/mips/mti-malta/malta-int.c                    |   22 +++++++++++++++++++-
 3 files changed, 41 insertions(+), 1 deletions(-)

diff --git a/arch/mips/include/asm/mach-malta/cpu-feature-overrides.h 
b/arch/mips/include/asm/mach-malta/cpu-feature-overrides.h
index 37e3583..0bf3872 100644
--- a/arch/mips/include/asm/mach-malta/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-malta/cpu-feature-overrides.h
@@ -17,6 +17,9 @@
 #define cpu_has_tlb            1
 #define cpu_has_4kex           1
 #define cpu_has_4k_cache       1
+#ifdef CONFIG_MIPS_SP_FP_INTENSIVE
+#define cpu_has_fpu            0
+#endif
 /* #define cpu_has_fpu         ? */
 /* #define cpu_has_32fpr       ? */
 #define cpu_has_counter                1
diff --git a/arch/mips/kernel/vpe-cmp.c b/arch/mips/kernel/vpe-cmp.c
index 9d0c375..20f4497 100644
--- a/arch/mips/kernel/vpe-cmp.c
+++ b/arch/mips/kernel/vpe-cmp.c
@@ -25,7 +25,24 @@
 
 static int major;
 
+#ifdef CONFIG_MIPS_MALTA
+#include <asm/amon.h>
+
+int vpe_run(struct vpe *v)
+{
+       struct vpe_notifications *n;
+
+       if (amon_cpu_start(aprp_cpu_index(), v->__start, 0, 0, 0) < 0)
+               return -1;
+
+       list_for_each_entry(n, &v->notify, list)
+               n->start(VPE_MODULE_MINOR);
+
+       return 0;
+}
+#else
 #error CMP vpe_run() not implemented!
+#endif
 
 void cleanup_tc(struct tc *tc)
 {
diff --git a/arch/mips/mti-malta/malta-int.c b/arch/mips/mti-malta/malta-int.c
index 647b863..cddda99 100644
--- a/arch/mips/mti-malta/malta-int.c
+++ b/arch/mips/mti-malta/malta-int.c
@@ -1,6 +1,6 @@
 /*
  * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000, 2001, 2004 MIPS Technologies, Inc.
+ * Copyright (C) 2000, 2001, 2004, 2012 MIPS Technologies, Inc.
  * Copyright (C) 2001 Ralf Baechle
  *
  *  This program is free software; you can distribute it and/or modify it
@@ -45,6 +45,9 @@
 #include <asm/gic.h>
 #include <asm/gcmpregs.h>
 #include <asm/setup.h>
+#ifdef CONFIG_MIPS_VPE_APSP_API
+#include <asm/rtlx.h>
+#endif
 
 int gcmp_present = -1;
 int gic_present;
@@ -128,6 +131,15 @@ static void malta_hw0_irqdispatch(void)
        }
 
        do_IRQ(MALTA_INT_BASE + irq);
+
+#if defined(CONFIG_MIPS_VPE_APSP_API) && !defined(CONFIG_MIPS_CMP)
+       /*
+        * When sw0 gets set, a spurious hw interrupt is signaled as well.
+        * The sw0 will not be handled until the hw interrupt is cleared.
+        * We use the hook to handle sw0 and the hw interrupt gets cleared.
+        */
+       aprp_hook();
+#endif
 }
 
 static void malta_ipi_irqdispatch(void)
@@ -312,6 +324,10 @@ static void ipi_call_dispatch(void)
 
 static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id)
 {
+#if defined(CONFIG_MIPS_VPE_APSP_API) && defined(CONFIG_MIPS_CMP)
+       aprp_hook();
+#endif
+
        scheduler_ipi();
 
        return IRQ_HANDLED;
@@ -622,6 +638,10 @@ void __init arch_init_irq(void)
                arch_init_ipiirq(cpu_ipi_call_irq, &irq_call);
 #endif
        }
+
+#ifdef CONFIG_MIPS_VPE_APSP_API
+       aprp_hook = null_aprp_hook;
+#endif
 }
 
 void malta_be_init(void)
-- 
1.7.1


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