linux-mips
[Top] [All Lists]

Re: [PATCH v3] MIPS: Optimise TLB handlers for MIPS32/64 R2 cores.

To: "Hill, Steven" <sjhill@mips.com>
Subject: Re: [PATCH v3] MIPS: Optimise TLB handlers for MIPS32/64 R2 cores.
From: "Jayachandran C." <jchandra@broadcom.com>
Date: Sat, 5 Jan 2013 01:21:58 +0530
Cc: "David Daney" <ddaney.cavm@gmail.com>, "linux-mips@linux-mips.org" <linux-mips@linux-mips.org>, "ralf@linux-mips.org" <ralf@linux-mips.org>
In-reply-to: <31E06A9FC96CEC488B43B19E2957C1B801146AF100@exchdb03.mips.com>
List-archive: <http://www.linux-mips.org/archives/linux-mips/>
List-help: <mailto:ecartis@linux-mips.org?Subject=help>
List-id: linux-mips <linux-mips.eddie.linux-mips.org>
List-owner: <mailto:ralf@linux-mips.org>
List-post: <mailto:linux-mips@linux-mips.org>
List-software: Ecartis version 1.0.0
List-subscribe: <mailto:ecartis@linux-mips.org?subject=subscribe%20linux-mips>
List-unsubscribe: <mailto:ecartis@linux-mips.org?subject=unsubscribe%20linux-mips>
References: <1357322355-31622-1-git-send-email-sjhill@mips.com> <50E71BF8.3050308@gmail.com> <31E06A9FC96CEC488B43B19E2957C1B801146AF100@exchdb03.mips.com>
Sender: linux-mips-bounce@linux-mips.org
User-agent: Mutt/1.5.21 (2010-09-15)
On Fri, Jan 04, 2013 at 06:24:54PM +0000, Hill, Steven wrote:
> >> +#ifdef CONFIG_64BIT
> >> +                     (PAGE_SHIFT - PTE_ORDER - PTE_T_LOG2 - 1));
> >> +#else
> >> +                     (PGDIR_SHIFT - PAGE_SHIFT - 1));
> >> +#endif
> >> +             UASM_i_INS(p, ptr, tmp, (PTE_T_LOG2 + 1),
> >
> > As far as I can tell, (PAGE_SHIFT - PTE_ORDER - PTE_T_LOG2 - 1) and
> > (PGDIR_SHIFT - PAGE_SHIFT - 1) are the same thing.  So why the two cases?
> >
> >Can you give an example of where they might differ?
> >
> David,
> 
> Actually, no I cannot. The calculation was given to me by 'jchandra' and 
> since I do not have 64-bit R2 hardware let alone the Broadcom platform, he 
> said it worked on his platform and I took it from him as is. So does this 
> patch work on Cavium platforms using both calculation methods? It would be 
> nice if 'jchandra' could chime in, but he may be on holiday or something.

This does not really need hardware. On 64bit, with 16k page, the expansion of
the macro is (from tlbex.i):

uasm_i_dext(p, tmp, tmp, 14 +1, ((14 + (14 + 0 - 3)) + (14 + 0 - 3))-14 -1); 

This evaluates to 21, which is obviously wrong (should be 10).

I had sent the generated tlb handler which showed the incorrect size to sjhill,
but that probably got lost in the new year holiday mails.

JC.


<Prev in Thread] Current Thread [Next in Thread>