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Re: [PATCH] Revert "MIPS: Optimise TLB handlers for MIPS32/64 R2 cores."

To: Jayachandran C <jchandra@broadcom.com>, ralf@linux-mips.org
Subject: Re: [PATCH] Revert "MIPS: Optimise TLB handlers for MIPS32/64 R2 cores."
From: David Daney <ddaney.cavm@gmail.com>
Date: Tue, 18 Dec 2012 10:27:20 -0800
Cc: "Steven J . Hill" <sjhill@mips.com>, linux-mips@linux-mips.org
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On 12/18/2012 01:50 AM, Jayachandran C wrote:
This reverts commit ff401e52100dcdc85e572d1ad376d3307b3fe28e.

The commit causes a boot-time crash on Netlogic XLP boards. The
crash is caused by the second part of the patch that changes
build_get_ptep(), which seems to break mips64 TLB handling on r2
platforms.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>

Acked-by: David Daney <david.daney@cavium.com>

The offending patch is incorrect and should be reverted. It uses EXT and INS on 64-bit values.

David Daney

---
  arch/mips/mm/tlbex.c |   16 ----------------
  1 file changed, 16 deletions(-)

diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index e085e15..1a17a9b 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -976,13 +976,6 @@ build_get_pgde32(u32 **p, unsigned int tmp, unsigned int 
ptr)
  #endif
        uasm_i_mfc0(p, tmp, C0_BADVADDR); /* get faulting address */
        uasm_i_lw(p, ptr, uasm_rel_lo(pgdc), ptr);
-
-       if (cpu_has_mips_r2) {
-               uasm_i_ext(p, tmp, tmp, PGDIR_SHIFT, (32 - PGDIR_SHIFT));
-               uasm_i_ins(p, ptr, tmp, PGD_T_LOG2, (32 - PGDIR_SHIFT));
-               return;
-       }
-
        uasm_i_srl(p, tmp, tmp, PGDIR_SHIFT); /* get pgd only bits */
        uasm_i_sll(p, tmp, tmp, PGD_T_LOG2);
        uasm_i_addu(p, ptr, ptr, tmp); /* add in pgd offset */
@@ -1018,15 +1011,6 @@ static void __cpuinit build_adjust_context(u32 **p, 
unsigned int ctx)

  static void __cpuinit build_get_ptep(u32 **p, unsigned int tmp, unsigned int 
ptr)
  {
-       if (cpu_has_mips_r2) {
-               /* PTE ptr offset is obtained from BadVAddr */
-               UASM_i_MFC0(p, tmp, C0_BADVADDR);
-               UASM_i_LW(p, ptr, 0, ptr);
-               uasm_i_ext(p, tmp, tmp, PAGE_SHIFT+1, PGDIR_SHIFT-PAGE_SHIFT-1);
-               uasm_i_ins(p, ptr, tmp, PTE_T_LOG2+1, PGDIR_SHIFT-PAGE_SHIFT-1);
-               return;
-       }
-
        /*
         * Bug workaround for the Nevada. It seems as if under certain
         * circumstances the move from cp0_context might produce a



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