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Re: [PATCH v2 00/18] KVM for MIPS32 Processors

To: Sanjay Lal <sanjayl@kymasys.com>, Ralf Baechle <ralf@linux-mips.org>
Subject: Re: [PATCH v2 00/18] KVM for MIPS32 Processors
From: David Daney <ddaney.cavm@gmail.com>
Date: Mon, 26 Nov 2012 10:53:52 -0800
Cc: kvm@vger.kernel.org, linux-mips@linux-mips.org
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I have several general questions about this patch...

On 11/21/2012 06:33 PM, Sanjay Lal wrote:
The following patchset implements KVM support for MIPS32R2 processors,
using Trap & Emulate, with basic runtime binary translation to improve
performance.  The goal has been to keep the Guest kernel changes to a
minimum.

What is the point of minimizing guest kernel changes?

Because you are using an invented memory map, instead of the architecturally defined map, there is no hope of running a single kernel image both natively and as a guest. So why do you care about how many changes there are.


The patch is against Linux 3.7-rc6.  This is Version 2 of the patch set.

There is a companion patchset for QEMU that adds KVM support for the
MIPS target.

KVM/MIPS should support MIPS32-R2 processors and beyond.
It has been tested on the following platforms:
  - Malta Board with FPGA based 34K (Little Endian).
  - Sigma Designs TangoX board with a 24K based 8654 SoC (Little Endian).
  - Malta Board with 74K @ 1GHz (Little Endian).
  - OVPSim MIPS simulator from Imperas emulating a Malta board with
    24Kc and 1074Kc cores (Little Endian).

Unlike x86, there is no concept of a canonical MIPS system for you to implement. So the choice of emulating a Malta or one of the SigmaDesigns boards doesn't seem to me to give you anything.

Why not just define the guest system to be exactly the facilities provided by the VirtIO drivers?


[...]


Perhaps it is obvious from the patches, but I wasn't able to figure out how you solve the problem of the Root/Host kernel clobbering the K0 and K1 registers in its exception handlers. These registers are also used by the Guest kernel (aren't they)?

David Daney

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