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RE: [PATCH 07/20] KVM/MIPS32: Dynamic binary translation of select priv

To: Sanjay Lal <sanjayl@kymasys.com>
Subject: RE: [PATCH 07/20] KVM/MIPS32: Dynamic binary translation of select privileged instructions.
From: Sethi Varun-B16395 <B16395@freescale.com>
Date: Fri, 2 Nov 2012 05:58:59 +0000
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Cc: "kvm@vger.kernel.org" <kvm@vger.kernel.org>, "linux-mips@linux-mips.org" <linux-mips@linux-mips.org>, Avi Kivity <avi@redhat.com>
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Thread-topic: [PATCH 07/20] KVM/MIPS32: Dynamic binary translation of select privileged instructions.

> -----Original Message-----
> From: kvm-owner@vger.kernel.org [mailto:kvm-owner@vger.kernel.org] On
> Behalf Of Avi Kivity
> Sent: Thursday, November 01, 2012 8:54 PM
> To: Sanjay Lal
> Cc: kvm@vger.kernel.org; linux-mips@linux-mips.org
> Subject: Re: [PATCH 07/20] KVM/MIPS32: Dynamic binary translation of
> select privileged instructions.
> 
> On 10/31/2012 05:19 PM, Sanjay Lal wrote:
> > Currently, the following instructions are translated:
> > - CACHE (indexed)
> > - CACHE (va based): translated to a synci, overkill on D-CACHE
> operations, but still much faster than a trap.
> > - mfc0/mtc0: the virtual COP0 registers for the guest are implemented
> as 2-D array
> >   [COP#][SEL] and this is mapped into the guest kernel address space @
> VA 0x0.
> >   mfc0/mtc0 operations are transformed to load/stores.
> >
> 
> Seems to be more of binary patching, yes?  Binary translation usually
> involves hiding the translated code so the guest is not able to detect
> that it is patched.
> 
Typically, a dynamic binary translation solution should also involve a 
mechanism to trace the guest access to the modified pages. I don't think that 
support is present as a part
of the patch set. Do you plan to implement it?

-Varun


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