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Re: [PATCH 07/20] KVM/MIPS32: Dynamic binary translation of select priv

To: Sanjay Lal <sanjayl@kymasys.com>
Subject: Re: [PATCH 07/20] KVM/MIPS32: Dynamic binary translation of select privileged instructions.
From: Avi Kivity <avi@redhat.com>
Date: Thu, 01 Nov 2012 17:24:28 +0200
Cc: kvm@vger.kernel.org, linux-mips@linux-mips.org
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On 10/31/2012 05:19 PM, Sanjay Lal wrote:
> Currently, the following instructions are translated:
> - CACHE (indexed)
> - CACHE (va based): translated to a synci, overkill on D-CACHE operations, 
> but still much faster than a trap.
> - mfc0/mtc0: the virtual COP0 registers for the guest are implemented as 2-D 
> array
>   [COP#][SEL] and this is mapped into the guest kernel address space @ VA 0x0.
>   mfc0/mtc0 operations are transformed to load/stores.
> 

Seems to be more of binary patching, yes?  Binary translation usually
involves hiding the translated code so the guest is not able to detect
that it is patched.


-- 
error compiling committee.c: too many arguments to function

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