| To: | Gabor Juhos <juhosg@openwrt.org> |
|---|---|
| Subject: | Re: [PATCH] MIPS: ath79: fix CPU/DDR frequency calculation for SRIF PLLs |
| From: | Ralf Baechle <ralf@linux-mips.org> |
| Date: | Sun, 23 Sep 2012 19:48:51 +0200 |
| Cc: | linux-mips@linux-mips.org, stable@vger.kernel.org |
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On Sat, Sep 08, 2012 at 02:02:21PM +0200, Gabor Juhos wrote: Applied but I had to fix a conflict: @@ -65,6 +65,8 @@ #define AR934X_WMAC_SIZE 0x20000 #define AR934X_EHCI_BASE 0x1b000000 #define AR934X_EHCI_SIZE 0x200 +#define AR934X_SRIF_BASE (AR71XX_APB_BASE + 0x00116000) +#define AR934X_SRIF_SIZE 0x1000 /* * DDR_CTRL block The EHCI lines don't exist yet. Seems harmless though. Ralf |
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