| To: | David Daney <ddaney.cavm@gmail.com> |
|---|---|
| Subject: | Re: [PATCH 1/4] MIPS: Add base architecture support for RI and XI. |
| From: | Kevin Cernekee <cernekee@gmail.com> |
| Date: | Wed, 5 Sep 2012 16:30:24 -0700 |
| Cc: | "Steven J. Hill" <sjhill@mips.com>, ralf@linux-mips.org, linux-mips@linux-mips.org |
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| References: | <1346876878-25965-1-git-send-email-sjhill@mips.com> <1346876878-25965-2-git-send-email-sjhill@mips.com> <5047BAA0.1010602@gmail.com> <5047C967.2010709@gmail.com> |
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On Wed, Sep 5, 2012 at 2:51 PM, David Daney <ddaney.cavm@gmail.com> wrote: > Nobody in their right mind would implement only one of RI or XI. So > splitting this feature into two parts just adds complication with no > benefit. Unless you have evidence that there is actual silicon that only > implements one of the two, there is no reason to split this, and to way to > test it. > > You can just keep kernel_uses_smartmips_rixi, and the rest of the patch set > is mostly unneeded. Recent BMIPS4380/BMIPS5000 cores support the XI bit, and ignore the RI bit. AFAICT it is safe to just use kernel_uses_smartmips_rixi=1 on these processors. |
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