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Re: [PATCH v2 3/3] MIPS: BCM47xx: rewrite GPIO handling and use gpiolib

To: Florian Fainelli <florian@openwrt.org>
Subject: Re: [PATCH v2 3/3] MIPS: BCM47xx: rewrite GPIO handling and use gpiolib
From: Rafał Miłecki <zajec5@gmail.com>
Date: Thu, 16 Aug 2012 19:39:10 +0200
Cc: Hauke Mehrtens <hauke@hauke-m.de>, ralf@linux-mips.org, linux-mips@linux-mips.org, linux-wireless@vger.kernel.org, john@phrozen.org
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2012/8/16 Florian Fainelli <florian@openwrt.org>:
>> +void __init bcm47xx_gpio_init(void)
>> +{
>> +     int err;
>> +
>> +     switch (bcm47xx_bus_type) {
>> +#ifdef CONFIG_BCM47XX_SSB
>> +     case BCM47XX_BUS_TYPE_SSB:
>> +             bcm47xx_gpio_count = ssb_gpio_count(&bcm47xx_bus.ssb);
>> +#endif
>> +#ifdef CONFIG_BCM47XX_BCMA
>> +     case BCM47XX_BUS_TYPE_BCMA:
>> +             bcm47xx_gpio_count = bcma_gpio_count(&bcm47xx_bus.bcma.bus);
>> +#endif
>> +     }
>
> Is this exclusive? Cannot we have both SSB and BCMA on the same device?

This applies to SoC only, so I believe it's fine. We don't have SoCs
based on BCMA and SSB at the same time.

You can find devices with multiple buses, but additional ones are
connected via PCIE or USB interface (or some other I don't know
about).

-- 
Rafał

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