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Re: [PATCH]: Improve atomic.h robustness

To: Joshua Kinard <kumba@gentoo.org>
Subject: Re: [PATCH]: Improve atomic.h robustness
From: Ralf Baechle <ralf@linux-mips.org>
Date: Tue, 14 Aug 2012 14:37:13 +0200
Cc: Linux MIPS List <linux-mips@linux-mips.org>
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On Sun, Jun 24, 2012 at 09:01:34PM -0400, Joshua Kinard wrote:

> I've maintained this patch, originally from Thiemo Seufer in 2004, for a
> really long time, but I think it's time for it to get a look at for possible
> inclusion.  I have had no problems with it across various SGI systems over
> the years.
> 
> To quote the post here:
> http://www.linux-mips.org/archives/linux-mips/2004-12/msg00000.html
> 
> "the atomic functions use so far memory references for the inline
> assembler to access the semaphore. This can lead to additional
> instructions in the ll/sc loop, because newer compilers don't
> expand the memory reference any more but leave it to the assembler.
> 
> The appended patch uses registers instead, and makes the ll/sc
> arguments more explicit. In some cases it will lead also to better
> register scheduling because the register isn't bound to an output
> any more."

I have faint memories of having tried this myself and very ancient
compilers didn't like the + constraint in inline assembler; somewhat
less ancient compilers did generate slightly bigger code.  With gcc 4.7
I am getting exactly the same codesize as without your patch applied.
The patch shouldn't do anything to robustness but sureles makes the
inline assembler a bit more readable so I'm queueing this for the next
release.

Thanks,

  Ralf

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