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[PATCH v5,1/5] MIPS: Add support for the 1074K core.

To: linux-mips@linux-mips.org
Subject: [PATCH v5,1/5] MIPS: Add support for the 1074K core.
From: "Steven J. Hill" <sjhill@mips.com>
Date: Tue, 26 Jun 2012 00:11:03 -0500
Cc: "Steven J. Hill" <sjhill@mips.com>, ralf@linux-mips.org
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From: "Steven J. Hill" <sjhill@mips.com>

Signed-off-by: Steven J. Hill <sjhill@mips.com>
---
 arch/mips/include/asm/cpu.h      |    1 +
 arch/mips/include/asm/mipsregs.h |    2 ++
 arch/mips/kernel/cpu-probe.c     |    4 ++++
 arch/mips/mm/c-r4k.c             |   20 +++++++++++++++++++-
 4 files changed, 26 insertions(+), 1 deletion(-)

diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index 95e40c1..ad3caba 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -94,6 +94,7 @@
 #define PRID_IMP_24KE          0x9600
 #define PRID_IMP_74K           0x9700
 #define PRID_IMP_1004K         0x9900
+#define PRID_IMP_1074K         0x9a00
 #define PRID_IMP_M14KC         0x9c00
 
 /*
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 7f87d82..60731ff 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -596,6 +596,8 @@
 #define MIPS_CONF4_MMUEXTDEF   (_ULCAST_(3) << 14)
 #define MIPS_CONF4_MMUEXTDEF_MMUSIZEEXT (_ULCAST_(1) << 14)
 
+#define MIPS_CONF6_SYND                (_ULCAST_(1) << 13)
+
 #define MIPS_CONF7_WII         (_ULCAST_(1) << 31)
 
 #define MIPS_CONF7_RPS         (_ULCAST_(1) << 2)
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 27404ad..78644e8 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -843,6 +843,10 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c, 
unsigned int cpu)
                c->cputype = CPU_1004K;
                __cpu_name[cpu] = "MIPS 1004Kc";
                break;
+       case PRID_IMP_1074K:
+               c->cputype = CPU_74K;
+               __cpu_name[cpu] = "MIPS 1074Kc";
+               break;
        }
 
        spram_config();
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index ce0dbee..4b08334 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -1040,10 +1040,27 @@ static void __cpuinit probe_pcache(void)
        case CPU_R14000:
                break;
 
+       case CPU_74K:
+               /*
+                * Early versions of the 74k do not update
+                * the cache tags on a vtag miss/ptag hit
+                * which can occur in the case of KSEG0/KUSEG aliases
+                * In this case it is better to treat the cache as always
+                * having aliases
+                */
+               if ((c->processor_id & 0xff) <= PRID_REV_ENCODE_332(2, 4, 0))
+                       c->dcache.flags |= MIPS_CACHE_VTAG;
+               if ((c->processor_id & 0xff) == PRID_REV_ENCODE_332(2, 4, 0))
+                       write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND);
+               if (((c->processor_id & 0xff00) == PRID_IMP_1074K) &&
+                   ((c->processor_id & 0xff) <= PRID_REV_ENCODE_332(1, 1, 0))) 
{
+                       c->dcache.flags |= MIPS_CACHE_VTAG;
+                       write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND);
+               }
+               /* fall through */
        case CPU_M14KC:
        case CPU_24K:
        case CPU_34K:
-       case CPU_74K:
        case CPU_1004K:
                if ((read_c0_config7() & (1 << 16))) {
                        /* effectively physically indexed dcache,
@@ -1051,6 +1068,7 @@ static void __cpuinit probe_pcache(void)
                        c->dcache.flags |= MIPS_CACHE_PINDEX;
                        break;
                }
+               /* fall through */
        default:
                if (c->dcache.waysize > PAGE_SIZE)
                        c->dcache.flags |= MIPS_CACHE_ALIASES;
-- 
1.7.10.3


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