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Re: [PATCH v4,1/5] MIPS: Add support for the 1074K core.

To: "Steven J. Hill" <sjhill@mips.com>
Subject: Re: [PATCH v4,1/5] MIPS: Add support for the 1074K core.
From: Sergei Shtylyov <sshtylyov@mvista.com>
Date: Mon, 25 Jun 2012 23:11:40 +0400
Cc: linux-mips@linux-mips.org, ralf@linux-mips.org
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Hello.

On 06/25/2012 07:09 PM, Steven J. Hill wrote:

From: "Steven J. Hill" <sjhill@mips.com>

Signed-off-by: Steven J. Hill <sjhill@mips.com>

   Minor nit on code formatting.

diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index ce0dbee..b96ebe9 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -1040,10 +1040,27 @@ static void __cpuinit probe_pcache(void)
        case CPU_R14000:
                break;

+       case CPU_74K:
+               /*
+                * Early versions of the 74k do not update
+                * the cache tags on a vtag miss/ptag hit
+                * which can occur in the case of KSEG0/KUSEG aliases
+                * In this case it is better to treat the cache as always
+                * having aliases
+                */
+               if ((c->processor_id & 0xff) <= PRID_REV_ENCODE_332(2, 4, 0))
+                       c->dcache.flags |= MIPS_CACHE_VTAG;
+               if ((c->processor_id & 0xff) == PRID_REV_ENCODE_332(2, 4, 0))
+                       write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND);
+               if (((c->processor_id & 0xff00) == PRID_IMP_1074K) &&
+                  ((c->processor_id & 0xff) <= PRID_REV_ENCODE_332(1, 1, 0))) {

Wrong indentation here -- the first ( should be shifted at least one space to the right.

WBR, Sergei

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