Re: [PATCH 07/14] MIPS: Loongson 3: Add serial port support.

[Arnaud Patard (Rtp) <arnaud.patard@rtp-net.org>]

Huacai Chen <chenhuacai@gmail.com> writes:

> Signed-off-by: Huacai Chen <chenhc@lemote.com>
> Signed-off-by: Hongliang Tao <taohl@lemote.com>
> Signed-off-by: Hua Yan <yanh@lemote.com>
> ---
>  arch/mips/include/asm/mach-loongson/loongson.h |    3 ++
>  arch/mips/loongson/common/serial.c             |   27 
> ++++++++++++++++++++++++
>  arch/mips/loongson/common/uart_base.c          |    5 ++++
>  3 files changed, 35 insertions(+), 0 deletions(-)
>
> diff --git a/arch/mips/include/asm/mach-loongson/loongson.h 
> b/arch/mips/include/asm/mach-loongson/loongson.h
> index fe7d9a6..16d0924 100644
> --- a/arch/mips/include/asm/mach-loongson/loongson.h
> +++ b/arch/mips/include/asm/mach-loongson/loongson.h
> @@ -125,6 +125,9 @@ static inline void do_perfcnt_IRQ(void)
>  #define LOONGSON_PCICONFIGBASE       0x00
>  #define LOONGSON_REGBASE     0x100
>  
> +/* Loongson-3A cpu uart */
> +#define LOONGSON_UART_BASE 0x1fe001e0

hm. if it's loongson3 specifique, why is it called like this and not
LOONGSON3_UART_BASE ?
Moreover, from a quick look, why don't you define it later in the file
with the proper macros, say:

#define LOONGSON3_UART_BASE     LOONGSON_REG(LOONGSON_REGBASE + 0xe0)


> +
>  /* PCI Configuration Registers */
>  
>  #define LOONGSON_PCI_REG(x)  LOONGSON_REG(LOONGSON_PCICONFIGBASE + (x))
> diff --git a/arch/mips/loongson/common/serial.c 
> b/arch/mips/loongson/common/serial.c
> index 7580873..6bfe9dd 100644
> --- a/arch/mips/loongson/common/serial.c
> +++ b/arch/mips/loongson/common/serial.c
> @@ -47,6 +47,33 @@ static struct plat_serial8250_port uart8250_data[][2] = {
>       [MACH_DEXXON_GDIUM2F10]         {PORT_M(3), {} },
>       [MACH_LEMOTE_NAS]               {PORT_M(3), {} },
>       [MACH_LEMOTE_LL2F]              {PORT(3), {} },
> +     [MACH_LEMOTE_A1004]             {
> +                                             {
> +                                                     .irq            = 
> MIPS_CPU_IRQ_BASE + 2,
> +                                                     .uartclk        = 
> 33177600,
> +                                                     .iotype         = 
> UPIO_MEM,
> +                                                     .flags          = 
> UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
> +                                             },
> +                                             {}
> +                                     },
> +     [MACH_LEMOTE_A1101]             {
> +                                             {
> +                                                     .irq            = 
> MIPS_CPU_IRQ_BASE + 2,
> +                                                     .uartclk        = 
> 25000000,
> +                                                     .iotype         = 
> UPIO_MEM,
> +                                                     .flags          = 
> UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
> +                                             },
> +                                             {}
> +                                     },
> +     [MACH_LEMOTE_A1205]             {
> +                                             {
> +                                                     .irq            = 
> MIPS_CPU_IRQ_BASE + 2,
> +                                                     .uartclk        = 
> 25000000,
> +                                                     .iotype         = 
> UPIO_MEM,
> +                                                     .flags          = 
> UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
> +                                             },
> +                                             {}
> +                                     },
>       [MACH_LOONGSON_END]             {},

What about modifying PORT_M to makes things clearer ?

Arnaud