[PATCH 1/3] MIPS: OCTEON: Fix build error when configured without PCI_MSI

[David Daney <ddaney.cavm@gmail.com>]

From: David Daney <david.daney@cavium.com>

The build dies with complaints about missing definition of
OCTEON_IRQ_RST.  This symbol was removed, so don't use it as part of
the definition of OCTEON_IRQ_LAST.

Set OCTEON_IRQ_LAST to 127 so there is space for all the automatically
allocated (via irq_domain) irqs.

Signed-off-by: David Daney <david.daney@cavium.com>
---
 arch/mips/include/asm/mach-cavium-octeon/irq.h |    5 +++--
 1 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/mips/include/asm/mach-cavium-octeon/irq.h 
b/arch/mips/include/asm/mach-cavium-octeon/irq.h
index f9bfb63..4189920 100644
--- a/arch/mips/include/asm/mach-cavium-octeon/irq.h
+++ b/arch/mips/include/asm/mach-cavium-octeon/irq.h
@@ -50,6 +50,9 @@ enum octeon_irq {
        OCTEON_IRQ_MII0,
        OCTEON_IRQ_MII1,
        OCTEON_IRQ_BOOTDMA,
+#ifndef CONFIG_PCI_MSI
+       OCTEON_IRQ_LAST = 127
+#endif
 };
 
 #ifdef CONFIG_PCI_MSI
@@ -58,8 +61,6 @@ enum octeon_irq {
 
 #define OCTEON_IRQ_MSI_LAST      (OCTEON_IRQ_MSI_BIT0 + 255)
 #define OCTEON_IRQ_LAST          (OCTEON_IRQ_MSI_LAST + 1)
-#else
-#define OCTEON_IRQ_LAST         (OCTEON_IRQ_RST + 1)
 #endif
 
 #endif
-- 
1.7.2.3