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[PATCH] MIPS: Add support for the M14KEc core.

To: linux-mips@linux-mips.org, ralf@linux-mips.org
Subject: [PATCH] MIPS: Add support for the M14KEc core.
From: "Steven J. Hill" <sjhill@mips.com>
Date: Thu, 24 May 2012 10:24:12 -0500
Cc: "Steven J. Hill" <sjhill@mips.com>
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From: "Steven J. Hill" <sjhill@mips.com>

Signed-off-by: Steven J. Hill <sjhill@mips.com>
---
 arch/mips/include/asm/cpu-features.h |    3 +++
 arch/mips/include/asm/cpu.h          |    4 +++-
 arch/mips/kernel/cpu-probe.c         |    7 +++++++
 arch/mips/mm/c-r4k.c                 |    1 +
 arch/mips/mm/tlbex.c                 |    2 ++
 arch/mips/oprofile/common.c          |    1 +
 arch/mips/oprofile/op_model_mipsxx.c |    4 ++++
 7 files changed, 21 insertions(+), 1 deletion(-)

diff --git a/arch/mips/include/asm/cpu-features.h 
b/arch/mips/include/asm/cpu-features.h
index 2daf1c5..98bee29 100644
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -98,6 +98,9 @@
 #ifndef kernel_uses_smartmips_rixi
 #define kernel_uses_smartmips_rixi 0
 #endif
+#ifndef cpu_has_mmips
+#define cpu_has_mmips          (cpu_data[0].options & MIPS_CPU_MICROMIPS)
+#endif
 #ifndef cpu_has_vtag_icache
 #define cpu_has_vtag_icache    (cpu_data[0].icache.flags & MIPS_CACHE_VTAG)
 #endif
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index ad3caba..559bd12 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -96,6 +96,7 @@
 #define PRID_IMP_1004K         0x9900
 #define PRID_IMP_1074K         0x9a00
 #define PRID_IMP_M14KC         0x9c00
+#define PRID_IMP_M14KEC                0x9e00
 
 /*
  * These are the PRID's for when 23:16 == PRID_COMP_SIBYTE
@@ -262,7 +263,7 @@ enum cpu_type_enum {
         */
        CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_1004K, CPU_74K,
        CPU_ALCHEMY, CPU_PR4450, CPU_BMIPS32, CPU_BMIPS3300, CPU_BMIPS4350,
-       CPU_BMIPS4380, CPU_BMIPS5000, CPU_JZRISC, CPU_M14KC,
+       CPU_BMIPS4380, CPU_BMIPS5000, CPU_JZRISC, CPU_M14KC, CPU_M14KEC,
 
        /*
         * MIPS64 class processors
@@ -319,6 +320,7 @@ enum cpu_type_enum {
 #define MIPS_CPU_VINT          0x00080000 /* CPU supports MIPSR2 vectored 
interrupts */
 #define MIPS_CPU_VEIC          0x00100000 /* CPU supports MIPSR2 external 
interrupt controller mode */
 #define MIPS_CPU_ULRI          0x00200000 /* CPU has ULRI feature */
+#define MIPS_CPU_MICROMIPS     0x01000000 /* CPU has microMIPS capability */
 
 /*
  * CPU ASE encodings
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index e92f76d..1382885 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -200,6 +200,7 @@ void __init check_wait(void)
                break;
 
        case CPU_M14KC:
+       case CPU_M14KEC:
        case CPU_24K:
        case CPU_34K:
        case CPU_1004K:
@@ -743,6 +744,8 @@ static inline unsigned int decode_config3(struct 
cpuinfo_mips *c)
                c->ases |= MIPS_ASE_MIPSMT;
        if (config3 & MIPS_CONF3_ULRI)
                c->options |= MIPS_CPU_ULRI;
+       if (config3 & MIPS_CONF3_ISA)
+               c->options |= MIPS_CPU_MICROMIPS;
 
        return config3 & MIPS_CONF_M;
 }
@@ -840,6 +843,10 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c, 
unsigned int cpu)
                c->cputype = CPU_M14KC;
                __cpu_name[cpu] = "MIPS M14Kc";
                break;
+       case PRID_IMP_M14KEC:
+               c->cputype = CPU_M14KEC;
+               __cpu_name[cpu] = "MIPS M14KEc";
+               break;
        case PRID_IMP_1004K:
                c->cputype = CPU_1004K;
                __cpu_name[cpu] = "MIPS 1004Kc";
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index c357491..bca1447 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -1093,6 +1093,7 @@ static void __cpuinit probe_pcache(void)
                }
                /* fall through */
        case CPU_M14KC:
+       case CPU_M14KEC:
        case CPU_24K:
        case CPU_34K:
        case CPU_1004K:
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index de7fe58..7155b59 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -458,6 +458,7 @@ static void __cpuinit build_tlb_write_entry(u32 **p, struct 
uasm_label **l,
                 */
                switch (current_cpu_type()) {
                case CPU_M14KC:
+               case CPU_M14KEC:
                case CPU_74K:
                        break;
 
@@ -510,6 +511,7 @@ static void __cpuinit build_tlb_write_entry(u32 **p, struct 
uasm_label **l,
        case CPU_4KC:
        case CPU_4KEC:
        case CPU_M14KC:
+       case CPU_M14KEC:
        case CPU_SB1:
        case CPU_SB1A:
        case CPU_4KSC:
diff --git a/arch/mips/oprofile/common.c b/arch/mips/oprofile/common.c
index b6e3782..ccf629a 100644
--- a/arch/mips/oprofile/common.c
+++ b/arch/mips/oprofile/common.c
@@ -79,6 +79,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
        switch (current_cpu_type()) {
        case CPU_5KC:
        case CPU_M14KC:
+       case CPU_M14KEC:
        case CPU_20KC:
        case CPU_24K:
        case CPU_25KF:
diff --git a/arch/mips/oprofile/op_model_mipsxx.c 
b/arch/mips/oprofile/op_model_mipsxx.c
index 4c1e21b..a86e93e 100644
--- a/arch/mips/oprofile/op_model_mipsxx.c
+++ b/arch/mips/oprofile/op_model_mipsxx.c
@@ -321,6 +321,10 @@ static int __init mipsxx_init(void)
                op_model_mipsxx_ops.cpu_type = "mips/M14Kc";
                break;
 
+       case CPU_M14KEC:
+               op_model_mipsxx_ops.cpu_type = "mips/M14KEc";
+               break;
+
        case CPU_20KC:
                op_model_mipsxx_ops.cpu_type = "mips/20K";
                break;
-- 
1.7.10


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