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Re: [v2,4/5] MIPS: Malta PCI changes for PCI 2.1 compatibility and confl

To: Ralf Baechle <ralf@linux-mips.org>
Subject: Re: [v2,4/5] MIPS: Malta PCI changes for PCI 2.1 compatibility and conflicts.
From: "Maciej W. Rozycki" <macro@linux-mips.org>
Date: Thu, 24 May 2012 13:56:54 +0100 (BST)
Cc: "Steven J. Hill" <sjhill@mips.com>, linux-mips@linux-mips.org
In-reply-to: <20120524112503.GA2337@linux-mips.org>
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On Thu, 24 May 2012, Ralf Baechle wrote:

> > diff --git a/arch/mips/mti-malta/malta-pci.c 
> > b/arch/mips/mti-malta/malta-pci.c
> > index bf80921..afeb619 100644
> > --- a/arch/mips/mti-malta/malta-pci.c
> > +++ b/arch/mips/mti-malta/malta-pci.c
> > @@ -241,8 +241,9 @@ void __init mips_pcibios_init(void)
> >             return;
> >     }
> >  
> > -   if (controller->io_resource->start < 0x00001000UL)      /* FIXME */
> > -           controller->io_resource->start = 0x00001000UL;
> > +   /* Change start address to avoid conflicts with ACPI and SMB devices */
> > +   if (controller->io_resource->start < 0x00002000UL)      /* FIXME */
> > +           controller->io_resource->start = 0x00002000UL;
> 
> I think raising this value to 0x2000 solves the FIXME which is there since
> Maciej's 66d9ad704b25287bfee7e86a5af50b92642b9c72 commit in 2005.  Maciej,
> do you recall you added the FIXME?

 Vaguely.  I reckon the bump was required because PIIX4 ACPI/SMB didn't 
reserve their resources that are not properly set/announced with standard 
PCI BARs in the PCI configuration space.  Chances therefore were something 
else would take this range and I reckon this was of course exactly what 
happened, ruining everything in a weird way.

 And I think it was the other way round -- I think bumping it up yet more 
is the wrong way of "fixing this up" (why is it needed anyway, did the 
assignment change? -- I don't remember if power-on defaults are used on 
Malta or if that is YAMON that initialises these).  I am fairly sure if I 
added that FIXME it was meant as a reminder to fix that properly and not 
do something as trivial as this.  And a proper fix is IMO either of these:

1. If there is a proper PIIX4 ACPI/SMB driver available then it should 
   reserve these resources to avoid the conflict.

2. Otherwise a PCI quirk should do that based on the PCI ID of the device 
   and the resource ranges obtained directly from the device (I reckon 
   they still use BARs, but in the vendor-specific space, they're not 
   fixed assignments), pretty much like some PC/AT legacy resources are 
   reserved (82xx series PIC, PIT, etc).

I don't remember why I didn't do either of these, sorry.

  Maciej

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