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[PATCH v2 1/5] MIPS: Introduce board_cache_error_setup() hook.

To: linux-mips@linux-mips.org, ralf@linux-mips.org
Subject: [PATCH v2 1/5] MIPS: Introduce board_cache_error_setup() hook.
From: David Daney <ddaney.cavm@gmail.com>
Date: Mon, 14 May 2012 17:04:46 -0700
Cc: David Daney <david.daney@cavium.com>
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Sender: linux-mips-bounce@linux-mips.org
From: David Daney <david.daney@cavium.com>

This is used in subsequent patches.

Signed-off-by: David Daney <david.daney@cavium.com>
---
 arch/mips/include/asm/traps.h |    1 +
 arch/mips/kernel/traps.c      |    5 ++++-
 2 files changed, 5 insertions(+), 1 deletions(-)

diff --git a/arch/mips/include/asm/traps.h b/arch/mips/include/asm/traps.h
index ff74aec..420ca06 100644
--- a/arch/mips/include/asm/traps.h
+++ b/arch/mips/include/asm/traps.h
@@ -25,6 +25,7 @@ extern void (*board_nmi_handler_setup)(void);
 extern void (*board_ejtag_handler_setup)(void);
 extern void (*board_bind_eic_interrupt)(int irq, int regset);
 extern void (*board_ebase_setup)(void);
+extern void (*board_cache_error_setup)(void);
 
 extern int register_nmi_notifier(struct notifier_block *nb);
 
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 9fd636b..b931eba 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -105,7 +105,7 @@ void (*board_nmi_handler_setup)(void);
 void (*board_ejtag_handler_setup)(void);
 void (*board_bind_eic_interrupt)(int irq, int regset);
 void (*board_ebase_setup)(void);
-
+void __cpuinitdata(*board_cache_error_setup)(void);
 
 static void show_raw_backtrace(unsigned long reg29)
 {
@@ -1845,6 +1845,9 @@ void __init trap_init(void)
 
        set_except_vector(26, handle_dsp);
 
+       if (board_cache_error_setup)
+               board_cache_error_setup();
+
        if (cpu_has_vce)
                /* Special exception: R4[04]00 uses also the divec space. */
                memcpy((void *)(ebase + 0x180), &except_vec3_r4000, 0x100);
-- 
1.7.2.3


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