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Re: [PATCH] MIPS: JZ4740: reset: Initialize hibernate wakeup counters.

To: Sergei Shtylyov <sshtylyov@mvista.com>
Subject: Re: [PATCH] MIPS: JZ4740: reset: Initialize hibernate wakeup counters.
From: Maarten ter Huurne <maarten@treewalker.org>
Date: Fri, 30 Mar 2012 16:07:41 +0200
Cc: Ralf Baechle <ralf@linux-mips.org>, Lars-Peter Clausen <lars@metafoo.de>, linux-mips@linux-mips.org
In-reply-to: <4F75A5C3.9000405@mvista.com>
References: <1333037998-18762-1-git-send-email-maarten@treewalker.org> <4F75A5C3.9000405@mvista.com>
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On Friday 30 March 2012 16:23:31 Sergei Shtylyov wrote:

[...]

> > +static void jz4740_power_off(void)
> > +{
> > +   void __iomem *rtc_base = ioremap(JZ4740_RTC_BASE_ADDR, 0x38);
> > +   unsigned long long wakeup_filter_ticks;
> > +   unsigned long long reset_counter_ticks;
> > +
> > +   /* Set minimum wakeup pin assertion time: 100 ms.
> > +      Range is 0 to 2 sec if RTC is clocked at 32 kHz. */
> > +   wakeup_filter_ticks = (100 * jz4740_clock_bdata.rtc_rate) / 1000;
> > +   if (wakeup_filter_ticks<  JZ_RTC_WAKEUP_FILTER_MASK)
> > +           wakeup_filter_ticks&= JZ_RTC_WAKEUP_FILTER_MASK;
> > +   else
> > +           wakeup_filter_ticks = JZ_RTC_WAKEUP_FILTER_MASK;
> > +   jz4740_rtc_wait_ready(rtc_base);
> > +   writel(wakeup_filter_ticks, rtc_base + JZ_REG_RTC_WAKEUP_FILTER);
> 
>     Writing 64-bit variable to a 32-bit register?

Actually the variable can be 32-bit: rtc_rate is in kHz, so the computation 
would wrap around for an RTC clock of over 40 GHz and I'm sure that is far 
more than the hardware supports.

I'll prepare a new patch fixing this and the other issues you mentioned. 
Thanks for reviewing.

Bye,
                Maarten


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