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Re: [PATCH] MIPS: JZ4740: reset: Initialize hibernate wakeup counters.

To: Maarten ter Huurne <maarten@treewalker.org>
Subject: Re: [PATCH] MIPS: JZ4740: reset: Initialize hibernate wakeup counters.
From: Sergei Shtylyov <sshtylyov@mvista.com>
Date: Fri, 30 Mar 2012 16:23:31 +0400
Cc: Ralf Baechle <ralf@linux-mips.org>, Lars-Peter Clausen <lars@metafoo.de>, linux-mips@linux-mips.org
In-reply-to: <1333037998-18762-1-git-send-email-maarten@treewalker.org>
References: <1333037998-18762-1-git-send-email-maarten@treewalker.org>
Sender: linux-mips-bounce@linux-mips.org
User-agent: Mozilla/5.0 (Windows NT 5.1; rv:11.0) Gecko/20120327 Thunderbird/11.0.1
Hello.

On 29-03-2012 20:19, Maarten ter Huurne wrote:

In hibernation mode only the wakeup logic and the RTC are left running,
so this is what users perceive as power down.

If the counters are not initialized, the corresponding pin (typically
connected to the power button) has to be asserted for two seconds
before the device wakes up. Most users expect a shorter wakeup time.

I took the timing values of 100 ms and 60 ms from BouKiCHi's patch for
the Dingoo A320 kernel.

Signed-off-by: Maarten ter Huurne<maarten@treewalker.org>
Acked-by: Lars-Peter Clausen<lars@metafoo.de>
---
  arch/mips/jz4740/reset.c |   46 ++++++++++++++++++++++++++++++++++++++++------
  1 files changed, 40 insertions(+), 6 deletions(-)

diff --git a/arch/mips/jz4740/reset.c b/arch/mips/jz4740/reset.c
index 5f1fb95..e6d1d7b 100644
--- a/arch/mips/jz4740/reset.c
+++ b/arch/mips/jz4740/reset.c
[...]
@@ -53,21 +56,52 @@ static void jz4740_restart(char *command)
[...]
-static void jz4740_power_off(void)
+static inline void jz4740_rtc_wait_ready(void __iomem *rtc_base)
  {
-       void __iomem *rtc_base = ioremap(JZ4740_RTC_BASE_ADDR, 0x24);
        uint32_t ctrl;
-

   Do not remove the empty line here.

        do {
                ctrl = readl(rtc_base + JZ_REG_RTC_CTRL);
        } while (!(ctrl&  JZ_RTC_CTRL_WRDY));
+}
+
+static void jz4740_power_off(void)
+{
+       void __iomem *rtc_base = ioremap(JZ4740_RTC_BASE_ADDR, 0x38);
+       unsigned long long wakeup_filter_ticks;
+       unsigned long long reset_counter_ticks;
+
+       /* Set minimum wakeup pin assertion time: 100 ms.
+          Range is 0 to 2 sec if RTC is clocked at 32 kHz. */
+       wakeup_filter_ticks = (100 * jz4740_clock_bdata.rtc_rate) / 1000;
+       if (wakeup_filter_ticks<  JZ_RTC_WAKEUP_FILTER_MASK)
+               wakeup_filter_ticks&= JZ_RTC_WAKEUP_FILTER_MASK;
+       else
+               wakeup_filter_ticks = JZ_RTC_WAKEUP_FILTER_MASK;
+       jz4740_rtc_wait_ready(rtc_base);
+       writel(wakeup_filter_ticks, rtc_base + JZ_REG_RTC_WAKEUP_FILTER);

   Writing 64-bit variable to a 32-bit register?

+       /* Set reset pin low-level assertion time after wakeup: 60 ms.
+          Range is 0 to 125 ms if RTC is clocked at 32 kHz. */

   The preferred style for multi-line comments is this:

/*
 * bla
 * bla
 */

+       reset_counter_ticks = (60 * jz4740_clock_bdata.rtc_rate) / 1000;
+       if (reset_counter_ticks<  JZ_RTC_RESET_COUNTER_MASK)
+               reset_counter_ticks&= JZ_RTC_RESET_COUNTER_MASK;
+       else
+               reset_counter_ticks = JZ_RTC_RESET_COUNTER_MASK;
+       jz4740_rtc_wait_ready(rtc_base);
+       writel(reset_counter_ticks, rtc_base + JZ_REG_RTC_RESET_COUNTER);

   Writing 64-bit variable to a 32-bit register?

WBR, Sergei


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