| To: | Sergei Shtylyov <sshtylyov@mvista.com> |
|---|---|
| Subject: | Re: [PATCH RESEND 16/17] MIPS: make oprofile use cp0_perfcount_irq if it is set |
| From: | Ralf Baechle <ralf@linux-mips.org> |
| Date: | Thu, 12 Jan 2012 18:02:51 +0100 |
| Cc: | John Crispin <blogic@openwrt.org>, linux-mips@linux-mips.org, Felix Fietkau <nbd@openwrt.org> |
| In-reply-to: | <4F0EFE6E.3080503@mvista.com> |
| References: | <1326314674-9899-1-git-send-email-blogic@openwrt.org> <1326314674-9899-16-git-send-email-blogic@openwrt.org> <4F0EFE6E.3080503@mvista.com> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mutt/1.5.21 (2010-09-15) |
On Thu, Jan 12, 2012 at 06:38:22PM +0300, Sergei Shtylyov wrote: > >@@ -374,6 +379,10 @@ static int __init mipsxx_init(void) > > save_perf_irq = perf_irq; > > perf_irq = mipsxx_perfcount_handler; > > > >+ if (cp0_perfcount_irq>= 0) > > BTW, I just noticed. IRQ0 is not a valid IRQ in Linux, > request_irq() should fail when passed 0, so this and following check > should be '> 0'. In a normal configuration that is in a discrete processor or in a MIPS core where the performance IRQ is just routed back into the core the lowest sensible value for cp0_perfcount_irq is 2, so there is no immediate problem there. IRQ 0 is ok for static use; dynamic use is problematic. This case is even more problematic because the interrupt might be shared with the timer and the timer interrupt is allocated statically (see cevt-r4k.c) but the performance counter interrupt later allocated dynamically with IRQF_SHARED. Ralf |
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