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Re: [PATCH 00/12] MIPS: ath79: AR724X PCI fixes and AR71XX PCI support

To: René Bolldorf <xsecute@googlemail.com>
Subject: Re: [PATCH 00/12] MIPS: ath79: AR724X PCI fixes and AR71XX PCI support
From: Gabor Juhos <juhosg@openwrt.org>
Date: Wed, 23 Nov 2011 21:39:32 +0100
Cc: Ralf Baechle <ralf@linux-mips.org>, linux-mips@linux-mips.org, Imre Kaloz <kaloz@openwrt.org>
In-reply-to: <CAEWqx5_hgSH0FoWJPL0JDrVXGTWFCV0-FH9hXPMTxbG3A1pScQ@mail.gmail.com>
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Hi,

<...>

>> I'm curious why do you think that it is broken now.
>> You are getting a data bus error by any chance?
>>
> 
> after a pci write, the pci read return bogus values.

Can you be more specific please? The new code reads bogus values from every
configuration registers or only from some of them?

> However, I go through this tomorrow.

Ok.

<...>

>>> -I never hit the pci controller bug, any steps to replicate?
>>
>> Hm, weird. Your devices are based on AR7240 or or AR7241?
>>
>> Regards,
>> Gabor
>>
> 
> AR7241 AH-4A

Yeah, that is different, my Bullet 5M uses an AR7240. I have retested the code
with and without the workaround on an AR7241 based board and it is working in
both cases. So it seems that the AR7241 is not affected. I will change the patch
to use the workaround only if the kernel is running on AR7240.

> Maybe it is better to split ar71xx and ar72xx pci support completly?

Sorry, what do you mean? It is separated already. The common functions are
'pcibios_map_irq', 'pcibios_plat_dev_init' and 'ath79_register_pci'. None of
these functions are related to accessing of the PCI devices. Additionally, the
'ath79_register_pci' function calls the appropriate 'ar7{1x,24}x_pcibios_init'
depending on the actual SoC, so the AR71XX specific PCI controller code never
runs on AR724X.

-Gabor

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