Re: [PATCH v2 06/11] MIPS: BCM63XX: add more register sets & missing reg

To:	Maxime Bizon <mbizon@freebox.fr>
Subject:	Re: [PATCH v2 06/11] MIPS: BCM63XX: add more register sets & missing register definitions.
From:	Ralf Baechle <ralf@linux-mips.org>
Date:	Wed, 16 Nov 2011 11:29:55 +0000
Cc:	linux-mips@linux-mips.org
In-reply-to:	<1320430175-13725-7-git-send-email-mbizon@freebox.fr>
References:	<1320430175-13725-1-git-send-email-mbizon@freebox.fr> <1320430175-13725-7-git-send-email-mbizon@freebox.fr>
Sender:	linux-mips-bounce@linux-mips.org
User-agent:	Mutt/1.5.21 (2010-09-15)

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Re: [PATCH v2 01/11] MIPS: BCM63XX: set default pci cache line size., (continued) Re: [PATCH v2 01/11] MIPS: BCM63XX: set default pci cache line size., Maxime Bizon Re: [PATCH v2 01/11] MIPS: BCM63XX: set default pci cache line size., Ralf Baechle [PATCH v2 02/11] MIPS: BCM63XX: hook up plat_ioremap to intercept soc registers remapping., Maxime Bizon Re: [PATCH v2 02/11] MIPS: BCM63XX: hook up plat_ioremap to intercept soc registers remapping., Ralf Baechle [PATCH v2 03/11] MIPS: BCM63XX: call board_register_device from device_initcall(), Maxime Bizon Re: [PATCH v2 03/11] MIPS: BCM63XX: call board_register_device from device_initcall(), Ralf Baechle [PATCH v2 11/11] MIPS: BCM63XX: add support for bcm6368 CPU., Maxime Bizon Re: [PATCH v2 11/11] MIPS: BCM63XX: add support for bcm6368 CPU., Ralf Baechle [PATCH v3 11/11] MIPS: BCM63XX: add support for bcm6368 CPU., Maxime Bizon [PATCH v2 06/11] MIPS: BCM63XX: add more register sets & missing register definitions., Maxime Bizon Re: [PATCH v2 06/11] MIPS: BCM63XX: add more register sets & missing register definitions., Ralf Baechle <= [PATCH v2 07/11] MIPS: BCM63XX: change irq code to prepare for per-cpu peculiarity., Maxime Bizon Re: [PATCH v2 07/11] MIPS: BCM63XX: change irq code to prepare for per-cpu peculiarity., Ralf Baechle [PATCH v2 08/11] MIPS: BCM63XX: prepare irq code to handle different external irq hardware implementation., Maxime Bizon Re: [PATCH v2 08/11] MIPS: BCM63XX: prepare irq code to handle different external irq hardware implementation., Ralf Baechle [PATCH v2 04/11] MIPS: BCM63XX: introduce bcm_readll & bcm_writell., Maxime Bizon Re: [PATCH v2 04/11] MIPS: BCM63XX: introduce bcm_readll & bcm_writell., Sergei Shtylyov Re: [PATCH v2 04/11] MIPS: BCM63XX: introduce bcm_readll & bcm_writell., Ralf Baechle [PATCH v2 05/11] MIPS: BCM63XX: cleanup cpu registers., Maxime Bizon Re: [PATCH v2 05/11] MIPS: BCM63XX: cleanup cpu registers., Ralf Baechle [PATCH v2 09/11] MIPS: BCM63XX: handle 64 bits irq stat register in irq code., Maxime Bizon

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