linux-mips
[Top] [All Lists]

Re: [PATCH 1/4] MIPS/Perf-events: update the map of unsupported events f

To: Deng-Cheng Zhu <dczhu@mips.com>
Subject: Re: [PATCH 1/4] MIPS/Perf-events: update the map of unsupported events for 74K
From: Ralf Baechle <ralf@linux-mips.org>
Date: Wed, 9 Nov 2011 20:40:20 +0000
Cc: linux-mips@linux-mips.org, Peter Zijlstra <a.p.zijlstra@chello.nl>, Paul Mackerras <paulus@samba.org>, Ingo Molnar <mingo@elte.hu>, Arnaldo Carvalho de Melo <acme@ghostprotocols.net>, David Daney <david.daney@cavium.com>
In-reply-to: <1319453762-12962-2-git-send-email-dczhu@mips.com>
References: <1319453762-12962-1-git-send-email-dczhu@mips.com> <1319453762-12962-2-git-send-email-dczhu@mips.com>
Sender: linux-mips-bounce@linux-mips.org
User-agent: Mutt/1.5.21 (2010-09-15)
On Mon, Oct 24, 2011 at 06:55:59PM +0800, Deng-Cheng Zhu wrote:

> Update the raw event info for 74K according to the latest document.

> +/*
> + * MIPS document MD00519 (MIPS32(r) 74K(tm) Processor Core Family Software
> + * User's Manual, Revision 01.05)
> + */
>  #define IS_UNSUPPORTED_74K_EVENT(r, b)                                       
> \
> -     ((r) == 5 || ((r) >= 135 && (r) <= 137) ||                      \
> -      ((b) >= 10 && (b) <= 12) || (b) == 22 || (b) == 27 ||          \
> -      (b) == 33 || (b) == 34 || ((b) >= 47 && (b) <= 49) ||          \
> -      (r) == 178 || (b) == 55 || (b) == 57 || (b) == 60 ||           \
> -      (b) == 61 || (r) == 62 || (r) == 191 ||                        \
> -      ((b) >= 64 && (b) <= 127))
> +     ((r) == 5 || (r) == 135 || ((b) >= 10 && (b) <= 12) ||          \
> +      (b) == 27 || (b) == 33 || (b) == 34 || (b) == 47 ||            \
> +      (b) == 48 || (r) == 178 || (r) == 187 || (b) == 60 ||          \
> +      (b) == 61 || (r) == 191 || (r) == 71 || (r) == 72 ||           \
> +      (b) == 73 || ((b) >= 77 && (b) <= 127))

I wonder if such detailed checking of the performance counter
event numbers is really needed?  As long as feeding an bad number only
results in undefined counts of the performance counters I think we may
be better of by not checking the event numbers in detail.  Afair there
are MIPS licensee who have modified the counters to count extra events
so I sense some madness in that direction.

  Ralf

<Prev in Thread] Current Thread [Next in Thread>