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[PATCH 6/9] MIPS: BMIPS: Add set/clear CP0 macros for BMIPS operations

To: Ralf Baechle <ralf@linux-mips.org>
Subject: [PATCH 6/9] MIPS: BMIPS: Add set/clear CP0 macros for BMIPS operations
From: Kevin Cernekee <cernekee@gmail.com>
Date: Sat, 05 Nov 2011 14:21:15 -0700
Cc: linux-mips@linux-mips.org
In-reply-to: <c2c8833593cb8eeef5c102468e105497@localhost>
References: <c2c8833593cb8eeef5c102468e105497@localhost>
Sender: linux-mips-bounce@linux-mips.org
User-agent: vim 7.2
Several BMIPS-specific CP0 registers are used for SMP boot and other
operations.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
---
 arch/mips/include/asm/mipsregs.h |    9 ++++++++-
 1 files changed, 8 insertions(+), 1 deletions(-)

diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 2ea7b81..7f87d82 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -1106,7 +1106,7 @@ do {                                                      
                \
 #define read_c0_brcm_reset()           __read_32bit_c0_register($22, 5)
 #define write_c0_brcm_reset(val)       __write_32bit_c0_register($22, 5, val)
 
-/* BMIPS4380 */
+/* BMIPS43xx */
 #define read_c0_brcm_cmt_intr()                __read_32bit_c0_register($22, 1)
 #define write_c0_brcm_cmt_intr(val)    __write_32bit_c0_register($22, 1, val)
 
@@ -1667,6 +1667,13 @@ __BUILD_SET_C0(config)
 __BUILD_SET_C0(intcontrol)
 __BUILD_SET_C0(intctl)
 __BUILD_SET_C0(srsmap)
+__BUILD_SET_C0(brcm_config_0)
+__BUILD_SET_C0(brcm_bus_pll)
+__BUILD_SET_C0(brcm_reset)
+__BUILD_SET_C0(brcm_cmt_intr)
+__BUILD_SET_C0(brcm_cmt_ctrl)
+__BUILD_SET_C0(brcm_config)
+__BUILD_SET_C0(brcm_mode)
 
 #endif /* !__ASSEMBLY__ */
 
-- 
1.7.6.3


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