| To: | Noor <noor.mubeen@gmail.com> |
|---|---|
| Subject: | Re: cause IP zero on interrupt |
| From: | David Daney <david.daney@cavium.com> |
| Date: | Fri, 21 Oct 2011 13:39:22 -0700 |
| Cc: | "linux-mips@linux-mips.org" <linux-mips@linux-mips.org> |
| In-reply-to: | <CAMmEz3QV+kWvRK9KnUdmKFGqNA8XUspjc_cH7aYXfea5XYaRAg@mail.gmail.com> |
| References: | <CAMmEz3QV+kWvRK9KnUdmKFGqNA8XUspjc_cH7aYXfea5XYaRAg@mail.gmail.com> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.1.15) Gecko/20101027 Fedora/3.0.10-1.fc12 Thunderbird/3.0.10 |
On 10/21/2011 01:18 PM, Noor wrote: what does it mean if cause register IP bits are zero after interrupt exception has already been invoked ? It might mean that something was asserting a '1' on to those bits, but quit doing so before you could read the cause register, or it could be that you get random interrupt exceptions for no reason at all. David Daney |
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