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Re: [RFC] mark Netlogic XLR chip as SMT capable

To: "Jayachandran C." <jayachandranc@netlogicmicro.com>
Subject: Re: [RFC] mark Netlogic XLR chip as SMT capable
From: Hillf Danton <dhillf@gmail.com>
Date: Tue, 4 Oct 2011 18:48:25 +0800
Cc: Ralf Baechle <ralf@linux-mips.org>, linux-mips@linux-mips.org
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On Mon, Oct 3, 2011 at 6:39 PM, Jayachandran C.
<jayachandranc@netlogicmicro.com> wrote:
> On Mon, Oct 03, 2011 at 11:32:04AM +0100, Ralf Baechle wrote:
>> On Mon, Oct 03, 2011 at 01:46:46PM +0800, Hillf Danton wrote:
>>
>> > +   unsigned int cpu, core_id;
>> > +
>> > +   cpu = smp_processor_id();
>> > +   core_id = (cpu >> 2) & 0x7;
>> > +   cpu_data[cpu].core = core_id;
>>
>> This is going to break in setups where Linux is not being booted on
>> what the hardware considers CPU core 0.  Which is not uncommon in embedded
>> setups.  You may want to probe the hardware for the core ID rather than
>> relying on smp_processor_id() here.
>
> Yes, the function hard_smp_processor_id() from netlogic/mips-extns.h has to
> be used here.
>
> This also conflicts with the recent patch-set for XLP support, but I don't
> know the status of that yet.
>

Thanks JC and Ralf. Your comments are included in the following version.

Hillf
----------------------------------------------------------------------------
Subject: [RFC] Mark Netlogic XLR chip to be SMT capable

Netlogic XLR chip has multiple cores. Each core includes four integrated
hardware threads, and they share L1 data and instruction caches.

If the chip is marked to be SMT capable, scheduler then could do more, say,
idle load balancing.

Changes are now confined only to the code of XLR, and hardware is probed
to get core ID for correct setup.

Signed-off-by: Hillf Danton <dhillf@gmail.com>
---

--- a/arch/mips/netlogic/xlr/smp.c      Sun Oct  2 14:15:28 2011
+++ b/arch/mips/netlogic/xlr/smp.c      Mon Oct  3 13:33:02 2011
@@ -104,6 +104,12 @@ void nlm_early_init_secondary(void)
  */
 static void __cpuinit nlm_init_secondary(void)
 {
+       unsigned int cpu, core_id;
+
+       cpu = hard_smp_processor_id();
+       core_id = (cpu >> 2) & 7;
+       cpu_data[cpu].core = core_id;
+
        nlm_smp_irq_init();
 }

@@ -176,6 +182,8 @@ void __init nlm_smp_setup(void)

 void nlm_prepare_cpus(unsigned int max_cpus)
 {
+       /* declare we are SMT capable */
+       smp_num_siblings = 4;
 }

 struct plat_smp_ops nlm_smp_ops = {

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