| To: | <ralf@linux-mips.org>, <binutils@sourceware.org>, <linux-mips@linux-mips.org>, <dvdkhlng@gmx.de> |
|---|---|
| Subject: | RE: $ta0 .. $ta3 registers in O32 on MIPS |
| From: | <Paul_Koning@Dell.com> |
| Date: | Wed, 28 Sep 2011 10:11:40 -0500 |
| Accept-language: | en-US |
| Acceptlanguage: | en-US |
| In-reply-to: | <20110928123305.GA1971@linux-mips.org> |
| References: | <20110928123305.GA1971@linux-mips.org> |
| Sender: | linux-mips-bounce@linux-mips.org |
| Thread-index: | Acx92r3YAHvtZ3s7Rm6mvuiE4xFJcAAFfHpw |
| Thread-topic: | $ta0 .. $ta3 registers in O32 on MIPS |
>The register names $ta0 .. $ta3 were added by SGI for N32 / N64 code.
>Because these reference $8 .. $11 just like $t0 .. $t3 in the O32 ABI their
>availability in O32 as well appears dangerous, if not a bug:
>
>$ cat s.s
> addu $ta0, $ta0
>$ mips-linux-as -o s.o s.s
>$ file s.o
>s.o: ELF 32-bit MSB relocatable, MIPS, MIPS-I version 1 (SYSV), not stripped $
>
>I was expecting an error message and I'm wondering, was this intentional?
I would say so. I call this a feature. It makes it easier to write assembly
code that assembles without change in both O32 and N32/N64. Consider a
function that has 4 or fewer arguments, but needs a pile of scratch registers.
It can use ta0-ta3 as four scratch registers, which is correct in all the ABIs.
paul
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